at32f403a_407_misc.c 4.6 KB

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  1. /**
  2. **************************************************************************
  3. * @file at32f403a_407_misc.c
  4. * @brief contains all the functions for the misc firmware library
  5. **************************************************************************
  6. * Copyright notice & Disclaimer
  7. *
  8. * The software Board Support Package (BSP) that is made available to
  9. * download from Artery official website is the copyrighted work of Artery.
  10. * Artery authorizes customers to use, copy, and distribute the BSP
  11. * software and its related documentation for the purpose of design and
  12. * development in conjunction with Artery microcontrollers. Use of the
  13. * software is governed by this copyright notice and the following disclaimer.
  14. *
  15. * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  16. * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  17. * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  18. * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  19. * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  21. *
  22. **************************************************************************
  23. */
  24. /* includes ------------------------------------------------------------------*/
  25. #include "at32f403a_407_conf.h"
  26. /** @addtogroup AT32F403A_407_periph_driver
  27. * @{
  28. */
  29. /** @defgroup MISC
  30. * @brief MISC driver modules
  31. * @{
  32. */
  33. #ifdef MISC_MODULE_ENABLED
  34. /** @defgroup MISC_private_functions
  35. * @{
  36. */
  37. #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
  38. /**
  39. * @brief system reset
  40. * @param none
  41. * @retval none
  42. */
  43. void nvic_system_reset(void)
  44. {
  45. NVIC_SystemReset();
  46. }
  47. /**
  48. * @brief enable nvic irq
  49. * @param irqn (IRQn_Type number)
  50. * @param preempt_priority: preemptive priority value (starting from 0)
  51. * @param sub_priority: subpriority value (starting from 0)
  52. * @retval none
  53. */
  54. void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
  55. {
  56. uint32_t temp_priority = 0;
  57. /* encode priority */
  58. temp_priority = NVIC_EncodePriority(NVIC_GetPriorityGrouping(), preempt_priority, sub_priority);
  59. /* set priority */
  60. NVIC_SetPriority(irqn, temp_priority);
  61. /* enable irqn */
  62. NVIC_EnableIRQ(irqn);
  63. }
  64. /**
  65. * @brief disable nvic irq number
  66. * @param irqn (IRQn_Type number)
  67. * @retval none
  68. */
  69. void nvic_irq_disable(IRQn_Type irqn)
  70. {
  71. NVIC_DisableIRQ(irqn);
  72. }
  73. /**
  74. * @brief config nvic priority group
  75. * @param priority_group
  76. * this parameter can be one of the following values:
  77. * - NVIC_PRIORITY_GROUP_0
  78. * - NVIC_PRIORITY_GROUP_1
  79. * - NVIC_PRIORITY_GROUP_2
  80. * - NVIC_PRIORITY_GROUP_3
  81. * - NVIC_PRIORITY_GROUP_4
  82. * @retval none
  83. */
  84. void nvic_priority_group_config(nvic_priority_group_type priority_group)
  85. {
  86. /* set the prigroup[10:8] bits according to nvic_prioritygroup value */
  87. NVIC_SetPriorityGrouping(priority_group);
  88. }
  89. /**
  90. * @brief set the vector table location and offset.
  91. * @param base
  92. * this parameter can be one of the following values:
  93. * - NVIC_VECTTAB_RAM
  94. * - NVIC_VECTTAB_FLASH
  95. * @param offset (vector table base offset field. this value must be a multiple of 0x200)
  96. * @retval none
  97. */
  98. void nvic_vector_table_set(uint32_t base, uint32_t offset)
  99. {
  100. SCB->VTOR = base | (offset & (uint32_t)0x1FFFFF80);
  101. }
  102. /**
  103. * @brief config nvic lowpower mode
  104. * @param lp_mode
  105. * this parameter can be one of the following values:
  106. * - NVIC_LP_SEVONPEND
  107. * - NVIC_LP_SLEEPDEEP
  108. * - NVIC_LP_SLEEPONEXIT
  109. * @param new_state (new state of lp condition. ENABLE or DISABLE)
  110. * @retval none
  111. */
  112. void nvic_lowpower_mode_config(nvic_lowpower_mode_type lp_mode, confirm_state new_state)
  113. {
  114. if(new_state != FALSE)
  115. {
  116. SCB->SCR |= lp_mode;
  117. }
  118. else
  119. {
  120. SCB->SCR &= (uint32_t)(~(uint32_t)lp_mode);
  121. }
  122. }
  123. /**
  124. * @brief config systick clock source
  125. * @param source
  126. * this parameter can be one of the following values:
  127. * - SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8
  128. * - SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV
  129. * @retval none
  130. */
  131. void systick_clock_source_config(systick_clock_source_type source)
  132. {
  133. if(source == SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV)
  134. {
  135. SysTick->CTRL |= SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV;
  136. }
  137. else
  138. {
  139. SysTick->CTRL &= ~(uint32_t)SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV;
  140. }
  141. }
  142. /**
  143. * @}
  144. */
  145. #endif
  146. /**
  147. * @}
  148. */
  149. /**
  150. * @}
  151. */