#include "at32f403a_407.h" #include "analog_input.h" #include "shift_reg.h" #include "utility.h" #include "FreeRTOS.h" #include "task.h" #include uint8_t input_mux; // выход сдвигового регистра U1010 (управляет MUX 301, 401) // мультиплексоры отвечат за коммутацию аналоговых входов и АЦП // void ai_connect_channel_301(uint8_t ch) { input_mux &= 0x70; switch (ch) { case AN_INP_1: input_mux |= 0x03; break; // U301 Y3 case AN_INP_2: input_mux |= 0x00; break; // U301 Y0 case AN_INP_3: input_mux |= 0x05; break; // U301 Y5 case AN_INP_4: input_mux |= 0x07; break; // U301 Y7 case AN_INP_5: input_mux |= 0x06; break; // U301 Y6 case AN_INP_6: input_mux |= 0x04; break; // U301 Y4 case V_ISO_CL: input_mux |= 0x01; break; // U301 Y1 case V_ISO : input_mux |= 0x02; break; // U301 Y2 default: break; } printf("Analog input connect register: "); print_binary_byte(input_mux); printf("\r\n"); } // void ai_connect_channel_401(uint8_t ch) { input_mux &= 0x07; switch (ch) { case AN_INP_7: input_mux |= (0x04 << 3); break; // U401 Y4 case AN_INP_8: input_mux |= (0x06 << 3); break; // U401 Y6 case AN_INP_9: input_mux |= (0x07 << 3); break; // U401 Y7 case AN_INP_10:input_mux |= (0x05 << 3); break; // U401 Y5 case AN_INP_11:input_mux |= (0x02 << 3); break; // U401 Y2 case AN_INP_12:input_mux |= (0x01 << 3); break; // U401 Y1 case CRNT_LIM_U_BFR_R: input_mux |= (0x00 << 3); break; // U401 Y0 case CRNT_LIM_U_ABFR_R: input_mux |= (0x03 << 3); break; // U401 Y3 default: break; } printf("Analog input connect register: "); print_binary_byte(input_mux); printf("\r\n"); } // void ai_connect_test(void) { ai_connect_channel_301(AN_INP_1); ai_connect_channel_301(AN_INP_2); ai_connect_channel_301(AN_INP_3); ai_connect_channel_301(AN_INP_4); ai_connect_channel_301(AN_INP_5); ai_connect_channel_301(AN_INP_6); ai_connect_channel_301(V_ISO_CL); ai_connect_channel_301(V_ISO); ai_connect_channel_401(AN_INP_7); ai_connect_channel_401(AN_INP_8); ai_connect_channel_401(AN_INP_9); ai_connect_channel_401(AN_INP_10); ai_connect_channel_401(AN_INP_11); ai_connect_channel_401(AN_INP_12); ai_connect_channel_401(CRNT_LIM_U_BFR_R); ai_connect_channel_401(CRNT_LIM_U_ABFR_R); }