stm32f4xx_i2c.c 50 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_i2c.c
  4. * @author MCD Application Team
  5. * @version V1.0.2
  6. * @date 05-March-2012
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Inter-integrated circuit (I2C)
  9. * - Initialization and Configuration
  10. * - Data transfers
  11. * - PEC management
  12. * - DMA transfers management
  13. * - Interrupts, events and flags management
  14. *
  15. * @verbatim
  16. *
  17. * ===================================================================
  18. * How to use this driver
  19. * ===================================================================
  20. * 1. Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE)
  21. * function for I2C1, I2C2 or I2C3.
  22. *
  23. * 2. Enable SDA, SCL and SMBA (when used) GPIO clocks using
  24. * RCC_AHBPeriphClockCmd() function.
  25. *
  26. * 3. Peripherals alternate function:
  27. * - Connect the pin to the desired peripherals' Alternate
  28. * Function (AF) using GPIO_PinAFConfig() function
  29. * - Configure the desired pin in alternate function by:
  30. * GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
  31. * - Select the type, pull-up/pull-down and output speed via
  32. * GPIO_PuPd, GPIO_OType and GPIO_Speed members
  33. * - Call GPIO_Init() function
  34. * Recommended configuration is Push-Pull, Pull-up, Open-Drain.
  35. * Add an external pull up if necessary (typically 4.7 KOhm).
  36. *
  37. * 4. Program the Mode, duty cycle , Own address, Ack, Speed and Acknowledged
  38. * Address using the I2C_Init() function.
  39. *
  40. * 5. Optionally you can enable/configure the following parameters without
  41. * re-initialization (i.e there is no need to call again I2C_Init() function):
  42. * - Enable the acknowledge feature using I2C_AcknowledgeConfig() function
  43. * - Enable the dual addressing mode using I2C_DualAddressCmd() function
  44. * - Enable the general call using the I2C_GeneralCallCmd() function
  45. * - Enable the clock stretching using I2C_StretchClockCmd() function
  46. * - Enable the fast mode duty cycle using the I2C_FastModeDutyCycleConfig()
  47. * function.
  48. * - Configure the NACK position for Master Receiver mode in case of
  49. * 2 bytes reception using the function I2C_NACKPositionConfig().
  50. * - Enable the PEC Calculation using I2C_CalculatePEC() function
  51. * - For SMBus Mode:
  52. * - Enable the Address Resolution Protocol (ARP) using I2C_ARPCmd() function
  53. * - Configure the SMBusAlert pin using I2C_SMBusAlertConfig() function
  54. *
  55. * 6. Enable the NVIC and the corresponding interrupt using the function
  56. * I2C_ITConfig() if you need to use interrupt mode.
  57. *
  58. * 7. When using the DMA mode
  59. * - Configure the DMA using DMA_Init() function
  60. * - Active the needed channel Request using I2C_DMACmd() or
  61. * I2C_DMALastTransferCmd() function.
  62. * @note When using DMA mode, I2C interrupts may be used at the same time to
  63. * control the communication flow (Start/Stop/Ack... events and errors).
  64. *
  65. * 8. Enable the I2C using the I2C_Cmd() function.
  66. *
  67. * 9. Enable the DMA using the DMA_Cmd() function when using DMA mode in the
  68. * transfers.
  69. *
  70. * @endverbatim
  71. *
  72. ******************************************************************************
  73. * @attention
  74. *
  75. * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
  76. *
  77. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  78. * You may not use this file except in compliance with the License.
  79. * You may obtain a copy of the License at:
  80. *
  81. * http://www.st.com/software_license_agreement_liberty_v2
  82. *
  83. * Unless required by applicable law or agreed to in writing, software
  84. * distributed under the License is distributed on an "AS IS" BASIS,
  85. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  86. * See the License for the specific language governing permissions and
  87. * limitations under the License.
  88. *
  89. ******************************************************************************
  90. */
  91. /* Includes ------------------------------------------------------------------*/
  92. #include "stm32f4xx_i2c.h"
  93. #include "stm32f4xx_rcc.h"
  94. /** @addtogroup STM32F4xx_StdPeriph_Driver
  95. * @{
  96. */
  97. /** @defgroup I2C
  98. * @brief I2C driver modules
  99. * @{
  100. */
  101. /* Private typedef -----------------------------------------------------------*/
  102. /* Private define ------------------------------------------------------------*/
  103. #define CR1_CLEAR_MASK ((uint16_t)0xFBF5) /*<! I2C registers Masks */
  104. #define FLAG_MASK ((uint32_t)0x00FFFFFF) /*<! I2C FLAG mask */
  105. #define ITEN_MASK ((uint32_t)0x07000000) /*<! I2C Interrupt Enable mask */
  106. /* Private macro -------------------------------------------------------------*/
  107. /* Private variables ---------------------------------------------------------*/
  108. /* Private function prototypes -----------------------------------------------*/
  109. /* Private functions ---------------------------------------------------------*/
  110. /** @defgroup I2C_Private_Functions
  111. * @{
  112. */
  113. /** @defgroup I2C_Group1 Initialization and Configuration functions
  114. * @brief Initialization and Configuration functions
  115. *
  116. @verbatim
  117. ===============================================================================
  118. Initialization and Configuration functions
  119. ===============================================================================
  120. @endverbatim
  121. * @{
  122. */
  123. /**
  124. * @brief Deinitialize the I2Cx peripheral registers to their default reset values.
  125. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  126. * @retval None
  127. */
  128. void I2C_DeInit(I2C_TypeDef* I2Cx)
  129. {
  130. /* Check the parameters */
  131. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  132. if (I2Cx == I2C1)
  133. {
  134. /* Enable I2C1 reset state */
  135. RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
  136. /* Release I2C1 from reset state */
  137. RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
  138. }
  139. else if (I2Cx == I2C2)
  140. {
  141. /* Enable I2C2 reset state */
  142. RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
  143. /* Release I2C2 from reset state */
  144. RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
  145. }
  146. else
  147. {
  148. if (I2Cx == I2C3)
  149. {
  150. /* Enable I2C3 reset state */
  151. RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE);
  152. /* Release I2C3 from reset state */
  153. RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE);
  154. }
  155. }
  156. }
  157. /**
  158. * @brief Initializes the I2Cx peripheral according to the specified
  159. * parameters in the I2C_InitStruct.
  160. *
  161. * @note To use the I2C at 400 KHz (in fast mode), the PCLK1 frequency
  162. * (I2C peripheral input clock) must be a multiple of 10 MHz.
  163. *
  164. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  165. * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that contains
  166. * the configuration information for the specified I2C peripheral.
  167. * @retval None
  168. */
  169. void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
  170. {
  171. uint16_t tmpreg = 0, freqrange = 0;
  172. uint16_t result = 0x04;
  173. uint32_t pclk1 = 8000000;
  174. RCC_ClocksTypeDef rcc_clocks;
  175. /* Check the parameters */
  176. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  177. assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));
  178. assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
  179. assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
  180. assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
  181. assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
  182. assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
  183. /*---------------------------- I2Cx CR2 Configuration ------------------------*/
  184. /* Get the I2Cx CR2 value */
  185. tmpreg = I2Cx->CR2;
  186. /* Clear frequency FREQ[5:0] bits */
  187. tmpreg &= (uint16_t)~((uint16_t)I2C_CR2_FREQ);
  188. /* Get pclk1 frequency value */
  189. RCC_GetClocksFreq(&rcc_clocks);
  190. pclk1 = rcc_clocks.PCLK1_Frequency;
  191. /* Set frequency bits depending on pclk1 value */
  192. freqrange = (uint16_t)(pclk1 / 1000000);
  193. tmpreg |= freqrange;
  194. /* Write to I2Cx CR2 */
  195. I2Cx->CR2 = tmpreg;
  196. /*---------------------------- I2Cx CCR Configuration ------------------------*/
  197. /* Disable the selected I2C peripheral to configure TRISE */
  198. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PE);
  199. /* Reset tmpreg value */
  200. /* Clear F/S, DUTY and CCR[11:0] bits */
  201. tmpreg = 0;
  202. /* Configure speed in standard mode */
  203. if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
  204. {
  205. /* Standard mode speed calculate */
  206. result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
  207. /* Test if CCR value is under 0x4*/
  208. if (result < 0x04)
  209. {
  210. /* Set minimum allowed value */
  211. result = 0x04;
  212. }
  213. /* Set speed value for standard mode */
  214. tmpreg |= result;
  215. /* Set Maximum Rise Time for standard mode */
  216. I2Cx->TRISE = freqrange + 1;
  217. }
  218. /* Configure speed in fast mode */
  219. /* To use the I2C at 400 KHz (in fast mode), the PCLK1 frequency (I2C peripheral
  220. input clock) must be a multiple of 10 MHz */
  221. else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
  222. {
  223. if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
  224. {
  225. /* Fast mode speed calculate: Tlow/Thigh = 2 */
  226. result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
  227. }
  228. else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
  229. {
  230. /* Fast mode speed calculate: Tlow/Thigh = 16/9 */
  231. result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
  232. /* Set DUTY bit */
  233. result |= I2C_DutyCycle_16_9;
  234. }
  235. /* Test if CCR value is under 0x1*/
  236. if ((result & I2C_CCR_CCR) == 0)
  237. {
  238. /* Set minimum allowed value */
  239. result |= (uint16_t)0x0001;
  240. }
  241. /* Set speed value and set F/S bit for fast mode */
  242. tmpreg |= (uint16_t)(result | I2C_CCR_FS);
  243. /* Set Maximum Rise Time for fast mode */
  244. I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);
  245. }
  246. /* Write to I2Cx CCR */
  247. I2Cx->CCR = tmpreg;
  248. /* Enable the selected I2C peripheral */
  249. I2Cx->CR1 |= I2C_CR1_PE;
  250. /*---------------------------- I2Cx CR1 Configuration ------------------------*/
  251. /* Get the I2Cx CR1 value */
  252. tmpreg = I2Cx->CR1;
  253. /* Clear ACK, SMBTYPE and SMBUS bits */
  254. tmpreg &= CR1_CLEAR_MASK;
  255. /* Configure I2Cx: mode and acknowledgement */
  256. /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
  257. /* Set ACK bit according to I2C_Ack value */
  258. tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
  259. /* Write to I2Cx CR1 */
  260. I2Cx->CR1 = tmpreg;
  261. /*---------------------------- I2Cx OAR1 Configuration -----------------------*/
  262. /* Set I2Cx Own Address1 and acknowledged address */
  263. I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
  264. }
  265. /**
  266. * @brief Fills each I2C_InitStruct member with its default value.
  267. * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
  268. * @retval None
  269. */
  270. void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
  271. {
  272. /*---------------- Reset I2C init structure parameters values ----------------*/
  273. /* initialize the I2C_ClockSpeed member */
  274. I2C_InitStruct->I2C_ClockSpeed = 5000;
  275. /* Initialize the I2C_Mode member */
  276. I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
  277. /* Initialize the I2C_DutyCycle member */
  278. I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
  279. /* Initialize the I2C_OwnAddress1 member */
  280. I2C_InitStruct->I2C_OwnAddress1 = 0;
  281. /* Initialize the I2C_Ack member */
  282. I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
  283. /* Initialize the I2C_AcknowledgedAddress member */
  284. I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
  285. }
  286. /**
  287. * @brief Enables or disables the specified I2C peripheral.
  288. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  289. * @param NewState: new state of the I2Cx peripheral.
  290. * This parameter can be: ENABLE or DISABLE.
  291. * @retval None
  292. */
  293. void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  294. {
  295. /* Check the parameters */
  296. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  297. assert_param(IS_FUNCTIONAL_STATE(NewState));
  298. if (NewState != DISABLE)
  299. {
  300. /* Enable the selected I2C peripheral */
  301. I2Cx->CR1 |= I2C_CR1_PE;
  302. }
  303. else
  304. {
  305. /* Disable the selected I2C peripheral */
  306. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PE);
  307. }
  308. }
  309. /**
  310. * @brief Generates I2Cx communication START condition.
  311. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  312. * @param NewState: new state of the I2C START condition generation.
  313. * This parameter can be: ENABLE or DISABLE.
  314. * @retval None.
  315. */
  316. void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
  317. {
  318. /* Check the parameters */
  319. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  320. assert_param(IS_FUNCTIONAL_STATE(NewState));
  321. if (NewState != DISABLE)
  322. {
  323. /* Generate a START condition */
  324. I2Cx->CR1 |= I2C_CR1_START;
  325. }
  326. else
  327. {
  328. /* Disable the START condition generation */
  329. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_START);
  330. }
  331. }
  332. /**
  333. * @brief Generates I2Cx communication STOP condition.
  334. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  335. * @param NewState: new state of the I2C STOP condition generation.
  336. * This parameter can be: ENABLE or DISABLE.
  337. * @retval None.
  338. */
  339. void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
  340. {
  341. /* Check the parameters */
  342. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  343. assert_param(IS_FUNCTIONAL_STATE(NewState));
  344. if (NewState != DISABLE)
  345. {
  346. /* Generate a STOP condition */
  347. I2Cx->CR1 |= I2C_CR1_STOP;
  348. }
  349. else
  350. {
  351. /* Disable the STOP condition generation */
  352. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_STOP);
  353. }
  354. }
  355. /**
  356. * @brief Transmits the address byte to select the slave device.
  357. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  358. * @param Address: specifies the slave address which will be transmitted
  359. * @param I2C_Direction: specifies whether the I2C device will be a Transmitter
  360. * or a Receiver.
  361. * This parameter can be one of the following values
  362. * @arg I2C_Direction_Transmitter: Transmitter mode
  363. * @arg I2C_Direction_Receiver: Receiver mode
  364. * @retval None.
  365. */
  366. void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction)
  367. {
  368. /* Check the parameters */
  369. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  370. assert_param(IS_I2C_DIRECTION(I2C_Direction));
  371. /* Test on the direction to set/reset the read/write bit */
  372. if (I2C_Direction != I2C_Direction_Transmitter)
  373. {
  374. /* Set the address bit0 for read */
  375. Address |= I2C_OAR1_ADD0;
  376. }
  377. else
  378. {
  379. /* Reset the address bit0 for write */
  380. Address &= (uint8_t)~((uint8_t)I2C_OAR1_ADD0);
  381. }
  382. /* Send the address */
  383. I2Cx->DR = Address;
  384. }
  385. /**
  386. * @brief Enables or disables the specified I2C acknowledge feature.
  387. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  388. * @param NewState: new state of the I2C Acknowledgement.
  389. * This parameter can be: ENABLE or DISABLE.
  390. * @retval None.
  391. */
  392. void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
  393. {
  394. /* Check the parameters */
  395. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  396. assert_param(IS_FUNCTIONAL_STATE(NewState));
  397. if (NewState != DISABLE)
  398. {
  399. /* Enable the acknowledgement */
  400. I2Cx->CR1 |= I2C_CR1_ACK;
  401. }
  402. else
  403. {
  404. /* Disable the acknowledgement */
  405. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ACK);
  406. }
  407. }
  408. /**
  409. * @brief Configures the specified I2C own address2.
  410. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  411. * @param Address: specifies the 7bit I2C own address2.
  412. * @retval None.
  413. */
  414. void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address)
  415. {
  416. uint16_t tmpreg = 0;
  417. /* Check the parameters */
  418. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  419. /* Get the old register value */
  420. tmpreg = I2Cx->OAR2;
  421. /* Reset I2Cx Own address2 bit [7:1] */
  422. tmpreg &= (uint16_t)~((uint16_t)I2C_OAR2_ADD2);
  423. /* Set I2Cx Own address2 */
  424. tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE);
  425. /* Store the new register value */
  426. I2Cx->OAR2 = tmpreg;
  427. }
  428. /**
  429. * @brief Enables or disables the specified I2C dual addressing mode.
  430. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  431. * @param NewState: new state of the I2C dual addressing mode.
  432. * This parameter can be: ENABLE or DISABLE.
  433. * @retval None
  434. */
  435. void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  436. {
  437. /* Check the parameters */
  438. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  439. assert_param(IS_FUNCTIONAL_STATE(NewState));
  440. if (NewState != DISABLE)
  441. {
  442. /* Enable dual addressing mode */
  443. I2Cx->OAR2 |= I2C_OAR2_ENDUAL;
  444. }
  445. else
  446. {
  447. /* Disable dual addressing mode */
  448. I2Cx->OAR2 &= (uint16_t)~((uint16_t)I2C_OAR2_ENDUAL);
  449. }
  450. }
  451. /**
  452. * @brief Enables or disables the specified I2C general call feature.
  453. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  454. * @param NewState: new state of the I2C General call.
  455. * This parameter can be: ENABLE or DISABLE.
  456. * @retval None
  457. */
  458. void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  459. {
  460. /* Check the parameters */
  461. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  462. assert_param(IS_FUNCTIONAL_STATE(NewState));
  463. if (NewState != DISABLE)
  464. {
  465. /* Enable generall call */
  466. I2Cx->CR1 |= I2C_CR1_ENGC;
  467. }
  468. else
  469. {
  470. /* Disable generall call */
  471. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENGC);
  472. }
  473. }
  474. /**
  475. * @brief Enables or disables the specified I2C software reset.
  476. * @note When software reset is enabled, the I2C IOs are released (this can
  477. * be useful to recover from bus errors).
  478. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  479. * @param NewState: new state of the I2C software reset.
  480. * This parameter can be: ENABLE or DISABLE.
  481. * @retval None
  482. */
  483. void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  484. {
  485. /* Check the parameters */
  486. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  487. assert_param(IS_FUNCTIONAL_STATE(NewState));
  488. if (NewState != DISABLE)
  489. {
  490. /* Peripheral under reset */
  491. I2Cx->CR1 |= I2C_CR1_SWRST;
  492. }
  493. else
  494. {
  495. /* Peripheral not under reset */
  496. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_SWRST);
  497. }
  498. }
  499. /**
  500. * @brief Enables or disables the specified I2C Clock stretching.
  501. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  502. * @param NewState: new state of the I2Cx Clock stretching.
  503. * This parameter can be: ENABLE or DISABLE.
  504. * @retval None
  505. */
  506. void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  507. {
  508. /* Check the parameters */
  509. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  510. assert_param(IS_FUNCTIONAL_STATE(NewState));
  511. if (NewState == DISABLE)
  512. {
  513. /* Enable the selected I2C Clock stretching */
  514. I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
  515. }
  516. else
  517. {
  518. /* Disable the selected I2C Clock stretching */
  519. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_NOSTRETCH);
  520. }
  521. }
  522. /**
  523. * @brief Selects the specified I2C fast mode duty cycle.
  524. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  525. * @param I2C_DutyCycle: specifies the fast mode duty cycle.
  526. * This parameter can be one of the following values:
  527. * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2
  528. * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9
  529. * @retval None
  530. */
  531. void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle)
  532. {
  533. /* Check the parameters */
  534. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  535. assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle));
  536. if (I2C_DutyCycle != I2C_DutyCycle_16_9)
  537. {
  538. /* I2C fast mode Tlow/Thigh=2 */
  539. I2Cx->CCR &= I2C_DutyCycle_2;
  540. }
  541. else
  542. {
  543. /* I2C fast mode Tlow/Thigh=16/9 */
  544. I2Cx->CCR |= I2C_DutyCycle_16_9;
  545. }
  546. }
  547. /**
  548. * @brief Selects the specified I2C NACK position in master receiver mode.
  549. * @note This function is useful in I2C Master Receiver mode when the number
  550. * of data to be received is equal to 2. In this case, this function
  551. * should be called (with parameter I2C_NACKPosition_Next) before data
  552. * reception starts,as described in the 2-byte reception procedure
  553. * recommended in Reference Manual in Section: Master receiver.
  554. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  555. * @param I2C_NACKPosition: specifies the NACK position.
  556. * This parameter can be one of the following values:
  557. * @arg I2C_NACKPosition_Next: indicates that the next byte will be the last
  558. * received byte.
  559. * @arg I2C_NACKPosition_Current: indicates that current byte is the last
  560. * received byte.
  561. *
  562. * @note This function configures the same bit (POS) as I2C_PECPositionConfig()
  563. * but is intended to be used in I2C mode while I2C_PECPositionConfig()
  564. * is intended to used in SMBUS mode.
  565. *
  566. * @retval None
  567. */
  568. void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition)
  569. {
  570. /* Check the parameters */
  571. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  572. assert_param(IS_I2C_NACK_POSITION(I2C_NACKPosition));
  573. /* Check the input parameter */
  574. if (I2C_NACKPosition == I2C_NACKPosition_Next)
  575. {
  576. /* Next byte in shift register is the last received byte */
  577. I2Cx->CR1 |= I2C_NACKPosition_Next;
  578. }
  579. else
  580. {
  581. /* Current byte in shift register is the last received byte */
  582. I2Cx->CR1 &= I2C_NACKPosition_Current;
  583. }
  584. }
  585. /**
  586. * @brief Drives the SMBusAlert pin high or low for the specified I2C.
  587. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  588. * @param I2C_SMBusAlert: specifies SMBAlert pin level.
  589. * This parameter can be one of the following values:
  590. * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low
  591. * @arg I2C_SMBusAlert_High: SMBAlert pin driven high
  592. * @retval None
  593. */
  594. void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert)
  595. {
  596. /* Check the parameters */
  597. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  598. assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
  599. if (I2C_SMBusAlert == I2C_SMBusAlert_Low)
  600. {
  601. /* Drive the SMBusAlert pin Low */
  602. I2Cx->CR1 |= I2C_SMBusAlert_Low;
  603. }
  604. else
  605. {
  606. /* Drive the SMBusAlert pin High */
  607. I2Cx->CR1 &= I2C_SMBusAlert_High;
  608. }
  609. }
  610. /**
  611. * @brief Enables or disables the specified I2C ARP.
  612. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  613. * @param NewState: new state of the I2Cx ARP.
  614. * This parameter can be: ENABLE or DISABLE.
  615. * @retval None
  616. */
  617. void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  618. {
  619. /* Check the parameters */
  620. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  621. assert_param(IS_FUNCTIONAL_STATE(NewState));
  622. if (NewState != DISABLE)
  623. {
  624. /* Enable the selected I2C ARP */
  625. I2Cx->CR1 |= I2C_CR1_ENARP;
  626. }
  627. else
  628. {
  629. /* Disable the selected I2C ARP */
  630. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENARP);
  631. }
  632. }
  633. /**
  634. * @}
  635. */
  636. /** @defgroup I2C_Group2 Data transfers functions
  637. * @brief Data transfers functions
  638. *
  639. @verbatim
  640. ===============================================================================
  641. Data transfers functions
  642. ===============================================================================
  643. @endverbatim
  644. * @{
  645. */
  646. /**
  647. * @brief Sends a data byte through the I2Cx peripheral.
  648. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  649. * @param Data: Byte to be transmitted..
  650. * @retval None
  651. */
  652. void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
  653. {
  654. /* Check the parameters */
  655. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  656. /* Write in the DR register the data to be sent */
  657. I2Cx->DR = Data;
  658. }
  659. /**
  660. * @brief Returns the most recent received data by the I2Cx peripheral.
  661. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  662. * @retval The value of the received data.
  663. */
  664. uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
  665. {
  666. /* Check the parameters */
  667. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  668. /* Return the data in the DR register */
  669. return (uint8_t)I2Cx->DR;
  670. }
  671. /**
  672. * @}
  673. */
  674. /** @defgroup I2C_Group3 PEC management functions
  675. * @brief PEC management functions
  676. *
  677. @verbatim
  678. ===============================================================================
  679. PEC management functions
  680. ===============================================================================
  681. @endverbatim
  682. * @{
  683. */
  684. /**
  685. * @brief Enables or disables the specified I2C PEC transfer.
  686. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  687. * @param NewState: new state of the I2C PEC transmission.
  688. * This parameter can be: ENABLE or DISABLE.
  689. * @retval None
  690. */
  691. void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
  692. {
  693. /* Check the parameters */
  694. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  695. assert_param(IS_FUNCTIONAL_STATE(NewState));
  696. if (NewState != DISABLE)
  697. {
  698. /* Enable the selected I2C PEC transmission */
  699. I2Cx->CR1 |= I2C_CR1_PEC;
  700. }
  701. else
  702. {
  703. /* Disable the selected I2C PEC transmission */
  704. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PEC);
  705. }
  706. }
  707. /**
  708. * @brief Selects the specified I2C PEC position.
  709. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  710. * @param I2C_PECPosition: specifies the PEC position.
  711. * This parameter can be one of the following values:
  712. * @arg I2C_PECPosition_Next: indicates that the next byte is PEC
  713. * @arg I2C_PECPosition_Current: indicates that current byte is PEC
  714. *
  715. * @note This function configures the same bit (POS) as I2C_NACKPositionConfig()
  716. * but is intended to be used in SMBUS mode while I2C_NACKPositionConfig()
  717. * is intended to used in I2C mode.
  718. *
  719. * @retval None
  720. */
  721. void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition)
  722. {
  723. /* Check the parameters */
  724. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  725. assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition));
  726. if (I2C_PECPosition == I2C_PECPosition_Next)
  727. {
  728. /* Next byte in shift register is PEC */
  729. I2Cx->CR1 |= I2C_PECPosition_Next;
  730. }
  731. else
  732. {
  733. /* Current byte in shift register is PEC */
  734. I2Cx->CR1 &= I2C_PECPosition_Current;
  735. }
  736. }
  737. /**
  738. * @brief Enables or disables the PEC value calculation of the transferred bytes.
  739. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  740. * @param NewState: new state of the I2Cx PEC value calculation.
  741. * This parameter can be: ENABLE or DISABLE.
  742. * @retval None
  743. */
  744. void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
  745. {
  746. /* Check the parameters */
  747. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  748. assert_param(IS_FUNCTIONAL_STATE(NewState));
  749. if (NewState != DISABLE)
  750. {
  751. /* Enable the selected I2C PEC calculation */
  752. I2Cx->CR1 |= I2C_CR1_ENPEC;
  753. }
  754. else
  755. {
  756. /* Disable the selected I2C PEC calculation */
  757. I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENPEC);
  758. }
  759. }
  760. /**
  761. * @brief Returns the PEC value for the specified I2C.
  762. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  763. * @retval The PEC value.
  764. */
  765. uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
  766. {
  767. /* Check the parameters */
  768. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  769. /* Return the selected I2C PEC value */
  770. return ((I2Cx->SR2) >> 8);
  771. }
  772. /**
  773. * @}
  774. */
  775. /** @defgroup I2C_Group4 DMA transfers management functions
  776. * @brief DMA transfers management functions
  777. *
  778. @verbatim
  779. ===============================================================================
  780. DMA transfers management functions
  781. ===============================================================================
  782. This section provides functions allowing to configure the I2C DMA channels
  783. requests.
  784. @endverbatim
  785. * @{
  786. */
  787. /**
  788. * @brief Enables or disables the specified I2C DMA requests.
  789. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  790. * @param NewState: new state of the I2C DMA transfer.
  791. * This parameter can be: ENABLE or DISABLE.
  792. * @retval None
  793. */
  794. void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  795. {
  796. /* Check the parameters */
  797. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  798. assert_param(IS_FUNCTIONAL_STATE(NewState));
  799. if (NewState != DISABLE)
  800. {
  801. /* Enable the selected I2C DMA requests */
  802. I2Cx->CR2 |= I2C_CR2_DMAEN;
  803. }
  804. else
  805. {
  806. /* Disable the selected I2C DMA requests */
  807. I2Cx->CR2 &= (uint16_t)~((uint16_t)I2C_CR2_DMAEN);
  808. }
  809. }
  810. /**
  811. * @brief Specifies that the next DMA transfer is the last one.
  812. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  813. * @param NewState: new state of the I2C DMA last transfer.
  814. * This parameter can be: ENABLE or DISABLE.
  815. * @retval None
  816. */
  817. void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
  818. {
  819. /* Check the parameters */
  820. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  821. assert_param(IS_FUNCTIONAL_STATE(NewState));
  822. if (NewState != DISABLE)
  823. {
  824. /* Next DMA transfer is the last transfer */
  825. I2Cx->CR2 |= I2C_CR2_LAST;
  826. }
  827. else
  828. {
  829. /* Next DMA transfer is not the last transfer */
  830. I2Cx->CR2 &= (uint16_t)~((uint16_t)I2C_CR2_LAST);
  831. }
  832. }
  833. /**
  834. * @}
  835. */
  836. /** @defgroup I2C_Group5 Interrupts events and flags management functions
  837. * @brief Interrupts, events and flags management functions
  838. *
  839. @verbatim
  840. ===============================================================================
  841. Interrupts, events and flags management functions
  842. ===============================================================================
  843. This section provides functions allowing to configure the I2C Interrupts
  844. sources and check or clear the flags or pending bits status.
  845. The user should identify which mode will be used in his application to manage
  846. the communication: Polling mode, Interrupt mode or DMA mode.
  847. ===============================================================================
  848. I2C State Monitoring Functions
  849. ===============================================================================
  850. This I2C driver provides three different ways for I2C state monitoring
  851. depending on the application requirements and constraints:
  852. 1. Basic state monitoring (Using I2C_CheckEvent() function)
  853. -----------------------------------------------------------
  854. It compares the status registers (SR1 and SR2) content to a given event
  855. (can be the combination of one or more flags).
  856. It returns SUCCESS if the current status includes the given flags
  857. and returns ERROR if one or more flags are missing in the current status.
  858. - When to use
  859. - This function is suitable for most applications as well as for startup
  860. activity since the events are fully described in the product reference
  861. manual (RM0090).
  862. - It is also suitable for users who need to define their own events.
  863. - Limitations
  864. - If an error occurs (ie. error flags are set besides to the monitored
  865. flags), the I2C_CheckEvent() function may return SUCCESS despite
  866. the communication hold or corrupted real state.
  867. In this case, it is advised to use error interrupts to monitor
  868. the error events and handle them in the interrupt IRQ handler.
  869. @note
  870. For error management, it is advised to use the following functions:
  871. - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
  872. - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
  873. Where x is the peripheral instance (I2C1, I2C2 ...)
  874. - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
  875. I2Cx_ER_IRQHandler() function in order to determine which error occurred.
  876. - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
  877. and/or I2C_GenerateStop() in order to clear the error flag and source
  878. and return to correct communication status.
  879. 2. Advanced state monitoring (Using the function I2C_GetLastEvent())
  880. --------------------------------------------------------------------
  881. Using the function I2C_GetLastEvent() which returns the image of both status
  882. registers in a single word (uint32_t) (Status Register 2 value is shifted left
  883. by 16 bits and concatenated to Status Register 1).
  884. - When to use
  885. - This function is suitable for the same applications above but it
  886. allows to overcome the mentioned limitation of I2C_GetFlagStatus()
  887. function.
  888. - The returned value could be compared to events already defined in
  889. the library (stm32f4xx_i2c.h) or to custom values defined by user.
  890. This function is suitable when multiple flags are monitored at the
  891. same time.
  892. - At the opposite of I2C_CheckEvent() function, this function allows
  893. user to choose when an event is accepted (when all events flags are
  894. set and no other flags are set or just when the needed flags are set
  895. like I2C_CheckEvent() function.
  896. - Limitations
  897. - User may need to define his own events.
  898. - Same remark concerning the error management is applicable for this
  899. function if user decides to check only regular communication flags
  900. (and ignores error flags).
  901. 3. Flag-based state monitoring (Using the function I2C_GetFlagStatus())
  902. -----------------------------------------------------------------------
  903. Using the function I2C_GetFlagStatus() which simply returns the status of
  904. one single flag (ie. I2C_FLAG_RXNE ...).
  905. - When to use
  906. - This function could be used for specific applications or in debug
  907. phase.
  908. - It is suitable when only one flag checking is needed (most I2C
  909. events are monitored through multiple flags).
  910. - Limitations:
  911. - When calling this function, the Status register is accessed.
  912. Some flags are cleared when the status register is accessed.
  913. So checking the status of one Flag, may clear other ones.
  914. - Function may need to be called twice or more in order to monitor
  915. one single event.
  916. For detailed description of Events, please refer to section I2C_Events in
  917. stm32f4xx_i2c.h file.
  918. @endverbatim
  919. * @{
  920. */
  921. /**
  922. * @brief Reads the specified I2C register and returns its value.
  923. * @param I2C_Register: specifies the register to read.
  924. * This parameter can be one of the following values:
  925. * @arg I2C_Register_CR1: CR1 register.
  926. * @arg I2C_Register_CR2: CR2 register.
  927. * @arg I2C_Register_OAR1: OAR1 register.
  928. * @arg I2C_Register_OAR2: OAR2 register.
  929. * @arg I2C_Register_DR: DR register.
  930. * @arg I2C_Register_SR1: SR1 register.
  931. * @arg I2C_Register_SR2: SR2 register.
  932. * @arg I2C_Register_CCR: CCR register.
  933. * @arg I2C_Register_TRISE: TRISE register.
  934. * @retval The value of the read register.
  935. */
  936. uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
  937. {
  938. __IO uint32_t tmp = 0;
  939. /* Check the parameters */
  940. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  941. assert_param(IS_I2C_REGISTER(I2C_Register));
  942. tmp = (uint32_t) I2Cx;
  943. tmp += I2C_Register;
  944. /* Return the selected register value */
  945. return (*(__IO uint16_t *) tmp);
  946. }
  947. /**
  948. * @brief Enables or disables the specified I2C interrupts.
  949. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  950. * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
  951. * This parameter can be any combination of the following values:
  952. * @arg I2C_IT_BUF: Buffer interrupt mask
  953. * @arg I2C_IT_EVT: Event interrupt mask
  954. * @arg I2C_IT_ERR: Error interrupt mask
  955. * @param NewState: new state of the specified I2C interrupts.
  956. * This parameter can be: ENABLE or DISABLE.
  957. * @retval None
  958. */
  959. void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
  960. {
  961. /* Check the parameters */
  962. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  963. assert_param(IS_FUNCTIONAL_STATE(NewState));
  964. assert_param(IS_I2C_CONFIG_IT(I2C_IT));
  965. if (NewState != DISABLE)
  966. {
  967. /* Enable the selected I2C interrupts */
  968. I2Cx->CR2 |= I2C_IT;
  969. }
  970. else
  971. {
  972. /* Disable the selected I2C interrupts */
  973. I2Cx->CR2 &= (uint16_t)~I2C_IT;
  974. }
  975. }
  976. /*
  977. ===============================================================================
  978. 1. Basic state monitoring
  979. ===============================================================================
  980. */
  981. /**
  982. * @brief Checks whether the last I2Cx Event is equal to the one passed
  983. * as parameter.
  984. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  985. * @param I2C_EVENT: specifies the event to be checked.
  986. * This parameter can be one of the following values:
  987. * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED: EV1
  988. * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED: EV1
  989. * @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED: EV1
  990. * @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED: EV1
  991. * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED: EV1
  992. * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED: EV2
  993. * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF): EV2
  994. * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL): EV2
  995. * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED: EV3
  996. * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF): EV3
  997. * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL): EV3
  998. * @arg I2C_EVENT_SLAVE_ACK_FAILURE: EV3_2
  999. * @arg I2C_EVENT_SLAVE_STOP_DETECTED: EV4
  1000. * @arg I2C_EVENT_MASTER_MODE_SELECT: EV5
  1001. * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED: EV6
  1002. * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED: EV6
  1003. * @arg I2C_EVENT_MASTER_BYTE_RECEIVED: EV7
  1004. * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING: EV8
  1005. * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED: EV8_2
  1006. * @arg I2C_EVENT_MASTER_MODE_ADDRESS10: EV9
  1007. *
  1008. * @note For detailed description of Events, please refer to section I2C_Events
  1009. * in stm32f4xx_i2c.h file.
  1010. *
  1011. * @retval An ErrorStatus enumeration value:
  1012. * - SUCCESS: Last event is equal to the I2C_EVENT
  1013. * - ERROR: Last event is different from the I2C_EVENT
  1014. */
  1015. ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
  1016. {
  1017. uint32_t lastevent = 0;
  1018. uint32_t flag1 = 0, flag2 = 0;
  1019. ErrorStatus status = ERROR;
  1020. /* Check the parameters */
  1021. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  1022. assert_param(IS_I2C_EVENT(I2C_EVENT));
  1023. /* Read the I2Cx status register */
  1024. flag1 = I2Cx->SR1;
  1025. flag2 = I2Cx->SR2;
  1026. flag2 = flag2 << 16;
  1027. /* Get the last event value from I2C status register */
  1028. lastevent = (flag1 | flag2) & FLAG_MASK;
  1029. /* Check whether the last event contains the I2C_EVENT */
  1030. if ((lastevent & I2C_EVENT) == I2C_EVENT)
  1031. {
  1032. /* SUCCESS: last event is equal to I2C_EVENT */
  1033. status = SUCCESS;
  1034. }
  1035. else
  1036. {
  1037. /* ERROR: last event is different from I2C_EVENT */
  1038. status = ERROR;
  1039. }
  1040. /* Return status */
  1041. return status;
  1042. }
  1043. /*
  1044. ===============================================================================
  1045. 2. Advanced state monitoring
  1046. ===============================================================================
  1047. */
  1048. /**
  1049. * @brief Returns the last I2Cx Event.
  1050. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  1051. *
  1052. * @note For detailed description of Events, please refer to section I2C_Events
  1053. * in stm32f4xx_i2c.h file.
  1054. *
  1055. * @retval The last event
  1056. */
  1057. uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
  1058. {
  1059. uint32_t lastevent = 0;
  1060. uint32_t flag1 = 0, flag2 = 0;
  1061. /* Check the parameters */
  1062. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  1063. /* Read the I2Cx status register */
  1064. flag1 = I2Cx->SR1;
  1065. flag2 = I2Cx->SR2;
  1066. flag2 = flag2 << 16;
  1067. /* Get the last event value from I2C status register */
  1068. lastevent = (flag1 | flag2) & FLAG_MASK;
  1069. /* Return status */
  1070. return lastevent;
  1071. }
  1072. /*
  1073. ===============================================================================
  1074. 3. Flag-based state monitoring
  1075. ===============================================================================
  1076. */
  1077. /**
  1078. * @brief Checks whether the specified I2C flag is set or not.
  1079. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  1080. * @param I2C_FLAG: specifies the flag to check.
  1081. * This parameter can be one of the following values:
  1082. * @arg I2C_FLAG_DUALF: Dual flag (Slave mode)
  1083. * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode)
  1084. * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode)
  1085. * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode)
  1086. * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
  1087. * @arg I2C_FLAG_BUSY: Bus busy flag
  1088. * @arg I2C_FLAG_MSL: Master/Slave flag
  1089. * @arg I2C_FLAG_SMBALERT: SMBus Alert flag
  1090. * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
  1091. * @arg I2C_FLAG_PECERR: PEC error in reception flag
  1092. * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
  1093. * @arg I2C_FLAG_AF: Acknowledge failure flag
  1094. * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
  1095. * @arg I2C_FLAG_BERR: Bus error flag
  1096. * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter)
  1097. * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag
  1098. * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode)
  1099. * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode)
  1100. * @arg I2C_FLAG_BTF: Byte transfer finished flag
  1101. * @arg I2C_FLAG_ADDR: Address sent flag (Master mode) "ADSL"
  1102. * Address matched flag (Slave mode)"ENDAD"
  1103. * @arg I2C_FLAG_SB: Start bit flag (Master mode)
  1104. * @retval The new state of I2C_FLAG (SET or RESET).
  1105. */
  1106. FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
  1107. {
  1108. FlagStatus bitstatus = RESET;
  1109. __IO uint32_t i2creg = 0, i2cxbase = 0;
  1110. /* Check the parameters */
  1111. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  1112. assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
  1113. /* Get the I2Cx peripheral base address */
  1114. i2cxbase = (uint32_t)I2Cx;
  1115. /* Read flag register index */
  1116. i2creg = I2C_FLAG >> 28;
  1117. /* Get bit[23:0] of the flag */
  1118. I2C_FLAG &= FLAG_MASK;
  1119. if(i2creg != 0)
  1120. {
  1121. /* Get the I2Cx SR1 register address */
  1122. i2cxbase += 0x14;
  1123. }
  1124. else
  1125. {
  1126. /* Flag in I2Cx SR2 Register */
  1127. I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
  1128. /* Get the I2Cx SR2 register address */
  1129. i2cxbase += 0x18;
  1130. }
  1131. if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
  1132. {
  1133. /* I2C_FLAG is set */
  1134. bitstatus = SET;
  1135. }
  1136. else
  1137. {
  1138. /* I2C_FLAG is reset */
  1139. bitstatus = RESET;
  1140. }
  1141. /* Return the I2C_FLAG status */
  1142. return bitstatus;
  1143. }
  1144. /**
  1145. * @brief Clears the I2Cx's pending flags.
  1146. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  1147. * @param I2C_FLAG: specifies the flag to clear.
  1148. * This parameter can be any combination of the following values:
  1149. * @arg I2C_FLAG_SMBALERT: SMBus Alert flag
  1150. * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
  1151. * @arg I2C_FLAG_PECERR: PEC error in reception flag
  1152. * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
  1153. * @arg I2C_FLAG_AF: Acknowledge failure flag
  1154. * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
  1155. * @arg I2C_FLAG_BERR: Bus error flag
  1156. *
  1157. * @note STOPF (STOP detection) is cleared by software sequence: a read operation
  1158. * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation
  1159. * to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
  1160. * @note ADD10 (10-bit header sent) is cleared by software sequence: a read
  1161. * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the
  1162. * second byte of the address in DR register.
  1163. * @note BTF (Byte Transfer Finished) is cleared by software sequence: a read
  1164. * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a
  1165. * read/write to I2C_DR register (I2C_SendData()).
  1166. * @note ADDR (Address sent) is cleared by software sequence: a read operation to
  1167. * I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to
  1168. * I2C_SR2 register ((void)(I2Cx->SR2)).
  1169. * @note SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1
  1170. * register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR
  1171. * register (I2C_SendData()).
  1172. *
  1173. * @retval None
  1174. */
  1175. void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
  1176. {
  1177. uint32_t flagpos = 0;
  1178. /* Check the parameters */
  1179. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  1180. assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
  1181. /* Get the I2C flag position */
  1182. flagpos = I2C_FLAG & FLAG_MASK;
  1183. /* Clear the selected I2C flag */
  1184. I2Cx->SR1 = (uint16_t)~flagpos;
  1185. }
  1186. /**
  1187. * @brief Checks whether the specified I2C interrupt has occurred or not.
  1188. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  1189. * @param I2C_IT: specifies the interrupt source to check.
  1190. * This parameter can be one of the following values:
  1191. * @arg I2C_IT_SMBALERT: SMBus Alert flag
  1192. * @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag
  1193. * @arg I2C_IT_PECERR: PEC error in reception flag
  1194. * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode)
  1195. * @arg I2C_IT_AF: Acknowledge failure flag
  1196. * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode)
  1197. * @arg I2C_IT_BERR: Bus error flag
  1198. * @arg I2C_IT_TXE: Data register empty flag (Transmitter)
  1199. * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag
  1200. * @arg I2C_IT_STOPF: Stop detection flag (Slave mode)
  1201. * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode)
  1202. * @arg I2C_IT_BTF: Byte transfer finished flag
  1203. * @arg I2C_IT_ADDR: Address sent flag (Master mode) "ADSL"
  1204. * Address matched flag (Slave mode)"ENDAD"
  1205. * @arg I2C_IT_SB: Start bit flag (Master mode)
  1206. * @retval The new state of I2C_IT (SET or RESET).
  1207. */
  1208. ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
  1209. {
  1210. ITStatus bitstatus = RESET;
  1211. uint32_t enablestatus = 0;
  1212. /* Check the parameters */
  1213. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  1214. assert_param(IS_I2C_GET_IT(I2C_IT));
  1215. /* Check if the interrupt source is enabled or not */
  1216. enablestatus = (uint32_t)(((I2C_IT & ITEN_MASK) >> 16) & (I2Cx->CR2)) ;
  1217. /* Get bit[23:0] of the flag */
  1218. I2C_IT &= FLAG_MASK;
  1219. /* Check the status of the specified I2C flag */
  1220. if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
  1221. {
  1222. /* I2C_IT is set */
  1223. bitstatus = SET;
  1224. }
  1225. else
  1226. {
  1227. /* I2C_IT is reset */
  1228. bitstatus = RESET;
  1229. }
  1230. /* Return the I2C_IT status */
  1231. return bitstatus;
  1232. }
  1233. /**
  1234. * @brief Clears the I2Cx's interrupt pending bits.
  1235. * @param I2Cx: where x can be 1, 2 or 3 to select the I2C peripheral.
  1236. * @param I2C_IT: specifies the interrupt pending bit to clear.
  1237. * This parameter can be any combination of the following values:
  1238. * @arg I2C_IT_SMBALERT: SMBus Alert interrupt
  1239. * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt
  1240. * @arg I2C_IT_PECERR: PEC error in reception interrupt
  1241. * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode)
  1242. * @arg I2C_IT_AF: Acknowledge failure interrupt
  1243. * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode)
  1244. * @arg I2C_IT_BERR: Bus error interrupt
  1245. *
  1246. * @note STOPF (STOP detection) is cleared by software sequence: a read operation
  1247. * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to
  1248. * I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
  1249. * @note ADD10 (10-bit header sent) is cleared by software sequence: a read
  1250. * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second
  1251. * byte of the address in I2C_DR register.
  1252. * @note BTF (Byte Transfer Finished) is cleared by software sequence: a read
  1253. * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a
  1254. * read/write to I2C_DR register (I2C_SendData()).
  1255. * @note ADDR (Address sent) is cleared by software sequence: a read operation to
  1256. * I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to
  1257. * I2C_SR2 register ((void)(I2Cx->SR2)).
  1258. * @note SB (Start Bit) is cleared by software sequence: a read operation to
  1259. * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to
  1260. * I2C_DR register (I2C_SendData()).
  1261. * @retval None
  1262. */
  1263. void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
  1264. {
  1265. uint32_t flagpos = 0;
  1266. /* Check the parameters */
  1267. assert_param(IS_I2C_ALL_PERIPH(I2Cx));
  1268. assert_param(IS_I2C_CLEAR_IT(I2C_IT));
  1269. /* Get the I2C flag position */
  1270. flagpos = I2C_IT & FLAG_MASK;
  1271. /* Clear the selected I2C flag */
  1272. I2Cx->SR1 = (uint16_t)~flagpos;
  1273. }
  1274. /**
  1275. * @}
  1276. */
  1277. /**
  1278. * @}
  1279. */
  1280. /**
  1281. * @}
  1282. */
  1283. /**
  1284. * @}
  1285. */
  1286. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/