stm32f4xx_rng.c 13 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_rng.c
  4. * @author MCD Application Team
  5. * @version V1.0.2
  6. * @date 05-March-2012
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Random Number Generator (RNG) peripheral:
  9. * - Initialization and Configuration
  10. * - Get 32 bit Random number
  11. * - Interrupts and flags management
  12. *
  13. * @verbatim
  14. *
  15. * ===================================================================
  16. * How to use this driver
  17. * ===================================================================
  18. * 1. Enable The RNG controller clock using
  19. * RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_RNG, ENABLE) function.
  20. *
  21. * 2. Activate the RNG peripheral using RNG_Cmd() function.
  22. *
  23. * 3. Wait until the 32 bit Random number Generator contains a valid
  24. * random data (using polling/interrupt mode). For more details,
  25. * refer to "Interrupts and flags management functions" module
  26. * description.
  27. *
  28. * 4. Get the 32 bit Random number using RNG_GetRandomNumber() function
  29. *
  30. * 5. To get another 32 bit Random number, go to step 3.
  31. *
  32. *
  33. *
  34. * @endverbatim
  35. *
  36. ******************************************************************************
  37. * @attention
  38. *
  39. * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
  40. *
  41. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  42. * You may not use this file except in compliance with the License.
  43. * You may obtain a copy of the License at:
  44. *
  45. * http://www.st.com/software_license_agreement_liberty_v2
  46. *
  47. * Unless required by applicable law or agreed to in writing, software
  48. * distributed under the License is distributed on an "AS IS" BASIS,
  49. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  50. * See the License for the specific language governing permissions and
  51. * limitations under the License.
  52. *
  53. ******************************************************************************
  54. */
  55. /* Includes ------------------------------------------------------------------*/
  56. #include "stm32f4xx_rng.h"
  57. #include "stm32f4xx_rcc.h"
  58. /** @addtogroup STM32F4xx_StdPeriph_Driver
  59. * @{
  60. */
  61. /** @defgroup RNG
  62. * @brief RNG driver modules
  63. * @{
  64. */
  65. /* Private typedef -----------------------------------------------------------*/
  66. /* Private define ------------------------------------------------------------*/
  67. /* Private macro -------------------------------------------------------------*/
  68. /* Private variables ---------------------------------------------------------*/
  69. /* Private function prototypes -----------------------------------------------*/
  70. /* Private functions ---------------------------------------------------------*/
  71. /** @defgroup RNG_Private_Functions
  72. * @{
  73. */
  74. /** @defgroup RNG_Group1 Initialization and Configuration functions
  75. * @brief Initialization and Configuration functions
  76. *
  77. @verbatim
  78. ===============================================================================
  79. Initialization and Configuration functions
  80. ===============================================================================
  81. This section provides functions allowing to
  82. - Initialize the RNG peripheral
  83. - Enable or disable the RNG peripheral
  84. @endverbatim
  85. * @{
  86. */
  87. /**
  88. * @brief Deinitializes the RNG peripheral registers to their default reset values.
  89. * @param None
  90. * @retval None
  91. */
  92. void RNG_DeInit(void)
  93. {
  94. /* Enable RNG reset state */
  95. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, ENABLE);
  96. /* Release RNG from reset state */
  97. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, DISABLE);
  98. }
  99. /**
  100. * @brief Enables or disables the RNG peripheral.
  101. * @param NewState: new state of the RNG peripheral.
  102. * This parameter can be: ENABLE or DISABLE.
  103. * @retval None
  104. */
  105. void RNG_Cmd(FunctionalState NewState)
  106. {
  107. /* Check the parameters */
  108. assert_param(IS_FUNCTIONAL_STATE(NewState));
  109. if (NewState != DISABLE)
  110. {
  111. /* Enable the RNG */
  112. RNG->CR |= RNG_CR_RNGEN;
  113. }
  114. else
  115. {
  116. /* Disable the RNG */
  117. RNG->CR &= ~RNG_CR_RNGEN;
  118. }
  119. }
  120. /**
  121. * @}
  122. */
  123. /** @defgroup RNG_Group2 Get 32 bit Random number function
  124. * @brief Get 32 bit Random number function
  125. *
  126. @verbatim
  127. ===============================================================================
  128. Get 32 bit Random number function
  129. ===============================================================================
  130. This section provides a function allowing to get the 32 bit Random number
  131. @note Before to call this function you have to wait till DRDY flag is set,
  132. using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
  133. @endverbatim
  134. * @{
  135. */
  136. /**
  137. * @brief Returns a 32-bit random number.
  138. *
  139. * @note Before to call this function you have to wait till DRDY (data ready)
  140. * flag is set, using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
  141. * @note Each time the the Random number data is read (using RNG_GetRandomNumber()
  142. * function), the RNG_FLAG_DRDY flag is automatically cleared.
  143. * @note In the case of a seed error, the generation of random numbers is
  144. * interrupted for as long as the SECS bit is '1'. If a number is
  145. * available in the RNG_DR register, it must not be used because it may
  146. * not have enough entropy. In this case, it is recommended to clear the
  147. * SEIS bit(using RNG_ClearFlag(RNG_FLAG_SECS) function), then disable
  148. * and enable the RNG peripheral (using RNG_Cmd() function) to
  149. * reinitialize and restart the RNG.
  150. * @note In the case of a clock error, the RNG is no more able to generate
  151. * random numbers because the PLL48CLK clock is not correct. User have
  152. * to check that the clock controller is correctly configured to provide
  153. * the RNG clock and clear the CEIS bit (using RNG_ClearFlag(RNG_FLAG_CECS)
  154. * function) . The clock error has no impact on the previously generated
  155. * random numbers, and the RNG_DR register contents can be used.
  156. *
  157. * @param None
  158. * @retval 32-bit random number.
  159. */
  160. uint32_t RNG_GetRandomNumber(void)
  161. {
  162. /* Return the 32 bit random number from the DR register */
  163. return RNG->DR;
  164. }
  165. /**
  166. * @}
  167. */
  168. /** @defgroup RNG_Group3 Interrupts and flags management functions
  169. * @brief Interrupts and flags management functions
  170. *
  171. @verbatim
  172. ===============================================================================
  173. Interrupts and flags management functions
  174. ===============================================================================
  175. This section provides functions allowing to configure the RNG Interrupts and
  176. to get the status and clear flags and Interrupts pending bits.
  177. The RNG provides 3 Interrupts sources and 3 Flags:
  178. Flags :
  179. ----------
  180. 1. RNG_FLAG_DRDY : In the case of the RNG_DR register contains valid
  181. random data. it is cleared by reading the valid data
  182. (using RNG_GetRandomNumber() function).
  183. 2. RNG_FLAG_CECS : In the case of a seed error detection.
  184. 3. RNG_FLAG_SECS : In the case of a clock error detection.
  185. Interrupts :
  186. ------------
  187. if enabled, an RNG interrupt is pending :
  188. 1. In the case of the RNG_DR register contains valid random data.
  189. This interrupt source is cleared once the RNG_DR register has been read
  190. (using RNG_GetRandomNumber() function) until a new valid value is
  191. computed.
  192. or
  193. 2. In the case of a seed error : One of the following faulty sequences has
  194. been detected:
  195. - More than 64 consecutive bits at the same value (0 or 1)
  196. - More than 32 consecutive alternance of 0 and 1 (0101010101...01)
  197. This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_SEI)
  198. function.
  199. or
  200. 3. In the case of a clock error : the PLL48CLK (RNG peripheral clock source)
  201. was not correctly detected (fPLL48CLK< fHCLK/16).
  202. This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_CEI)
  203. function.
  204. @note In this case, User have to check that the clock controller is
  205. correctly configured to provide the RNG clock.
  206. Managing the RNG controller events :
  207. ------------------------------------
  208. The user should identify which mode will be used in his application to manage
  209. the RNG controller events: Polling mode or Interrupt mode.
  210. 1. In the Polling Mode it is advised to use the following functions:
  211. - RNG_GetFlagStatus() : to check if flags events occur.
  212. - RNG_ClearFlag() : to clear the flags events.
  213. @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag(). it is cleared only
  214. by reading the Random number data.
  215. 2. In the Interrupt Mode it is advised to use the following functions:
  216. - RNG_ITConfig() : to enable or disable the interrupt source.
  217. - RNG_GetITStatus() : to check if Interrupt occurs.
  218. - RNG_ClearITPendingBit() : to clear the Interrupt pending Bit
  219. (corresponding Flag).
  220. @endverbatim
  221. * @{
  222. */
  223. /**
  224. * @brief Enables or disables the RNG interrupt.
  225. * @note The RNG provides 3 interrupt sources,
  226. * - Computed data is ready event (DRDY), and
  227. * - Seed error Interrupt (SEI) and
  228. * - Clock error Interrupt (CEI),
  229. * all these interrupts sources are enabled by setting the IE bit in
  230. * CR register. However, each interrupt have its specific status bit
  231. * (see RNG_GetITStatus() function) and clear bit except the DRDY event
  232. * (see RNG_ClearITPendingBit() function).
  233. * @param NewState: new state of the RNG interrupt.
  234. * This parameter can be: ENABLE or DISABLE.
  235. * @retval None
  236. */
  237. void RNG_ITConfig(FunctionalState NewState)
  238. {
  239. /* Check the parameters */
  240. assert_param(IS_FUNCTIONAL_STATE(NewState));
  241. if (NewState != DISABLE)
  242. {
  243. /* Enable the RNG interrupt */
  244. RNG->CR |= RNG_CR_IE;
  245. }
  246. else
  247. {
  248. /* Disable the RNG interrupt */
  249. RNG->CR &= ~RNG_CR_IE;
  250. }
  251. }
  252. /**
  253. * @brief Checks whether the specified RNG flag is set or not.
  254. * @param RNG_FLAG: specifies the RNG flag to check.
  255. * This parameter can be one of the following values:
  256. * @arg RNG_FLAG_DRDY: Data Ready flag.
  257. * @arg RNG_FLAG_CECS: Clock Error Current flag.
  258. * @arg RNG_FLAG_SECS: Seed Error Current flag.
  259. * @retval The new state of RNG_FLAG (SET or RESET).
  260. */
  261. FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG)
  262. {
  263. FlagStatus bitstatus = RESET;
  264. /* Check the parameters */
  265. assert_param(IS_RNG_GET_FLAG(RNG_FLAG));
  266. /* Check the status of the specified RNG flag */
  267. if ((RNG->SR & RNG_FLAG) != (uint8_t)RESET)
  268. {
  269. /* RNG_FLAG is set */
  270. bitstatus = SET;
  271. }
  272. else
  273. {
  274. /* RNG_FLAG is reset */
  275. bitstatus = RESET;
  276. }
  277. /* Return the RNG_FLAG status */
  278. return bitstatus;
  279. }
  280. /**
  281. * @brief Clears the RNG flags.
  282. * @param RNG_FLAG: specifies the flag to clear.
  283. * This parameter can be any combination of the following values:
  284. * @arg RNG_FLAG_CECS: Clock Error Current flag.
  285. * @arg RNG_FLAG_SECS: Seed Error Current flag.
  286. * @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag() function.
  287. * This flag is cleared only by reading the Random number data (using
  288. * RNG_GetRandomNumber() function).
  289. * @retval None
  290. */
  291. void RNG_ClearFlag(uint8_t RNG_FLAG)
  292. {
  293. /* Check the parameters */
  294. assert_param(IS_RNG_CLEAR_FLAG(RNG_FLAG));
  295. /* Clear the selected RNG flags */
  296. RNG->SR = ~(uint32_t)(((uint32_t)RNG_FLAG) << 4);
  297. }
  298. /**
  299. * @brief Checks whether the specified RNG interrupt has occurred or not.
  300. * @param RNG_IT: specifies the RNG interrupt source to check.
  301. * This parameter can be one of the following values:
  302. * @arg RNG_IT_CEI: Clock Error Interrupt.
  303. * @arg RNG_IT_SEI: Seed Error Interrupt.
  304. * @retval The new state of RNG_IT (SET or RESET).
  305. */
  306. ITStatus RNG_GetITStatus(uint8_t RNG_IT)
  307. {
  308. ITStatus bitstatus = RESET;
  309. /* Check the parameters */
  310. assert_param(IS_RNG_GET_IT(RNG_IT));
  311. /* Check the status of the specified RNG interrupt */
  312. if ((RNG->SR & RNG_IT) != (uint8_t)RESET)
  313. {
  314. /* RNG_IT is set */
  315. bitstatus = SET;
  316. }
  317. else
  318. {
  319. /* RNG_IT is reset */
  320. bitstatus = RESET;
  321. }
  322. /* Return the RNG_IT status */
  323. return bitstatus;
  324. }
  325. /**
  326. * @brief Clears the RNG interrupt pending bit(s).
  327. * @param RNG_IT: specifies the RNG interrupt pending bit(s) to clear.
  328. * This parameter can be any combination of the following values:
  329. * @arg RNG_IT_CEI: Clock Error Interrupt.
  330. * @arg RNG_IT_SEI: Seed Error Interrupt.
  331. * @retval None
  332. */
  333. void RNG_ClearITPendingBit(uint8_t RNG_IT)
  334. {
  335. /* Check the parameters */
  336. assert_param(IS_RNG_IT(RNG_IT));
  337. /* Clear the selected RNG interrupt pending bit */
  338. RNG->SR = (uint8_t)~RNG_IT;
  339. }
  340. /**
  341. * @}
  342. */
  343. /**
  344. * @}
  345. */
  346. /**
  347. * @}
  348. */
  349. /**
  350. * @}
  351. */
  352. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/