stm32f4xx_wwdg.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309
  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_wwdg.c
  4. * @author MCD Application Team
  5. * @version V1.0.2
  6. * @date 05-March-2012
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Window watchdog (WWDG) peripheral:
  9. * - Prescaler, Refresh window and Counter configuration
  10. * - WWDG activation
  11. * - Interrupts and flags management
  12. *
  13. * @verbatim
  14. *
  15. * ===================================================================
  16. * WWDG features
  17. * ===================================================================
  18. *
  19. * Once enabled the WWDG generates a system reset on expiry of a programmed
  20. * time period, unless the program refreshes the counter (downcounter)
  21. * before to reach 0x3F value (i.e. a reset is generated when the counter
  22. * value rolls over from 0x40 to 0x3F).
  23. * An MCU reset is also generated if the counter value is refreshed
  24. * before the counter has reached the refresh window value. This
  25. * implies that the counter must be refreshed in a limited window.
  26. *
  27. * Once enabled the WWDG cannot be disabled except by a system reset.
  28. *
  29. * WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
  30. * reset occurs.
  31. *
  32. * The WWDG counter input clock is derived from the APB clock divided
  33. * by a programmable prescaler.
  34. *
  35. * WWDG counter clock = PCLK1 / Prescaler
  36. * WWDG timeout = (WWDG counter clock) * (counter value)
  37. *
  38. * Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
  39. *
  40. * ===================================================================
  41. * How to use this driver
  42. * ===================================================================
  43. * 1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
  44. *
  45. * 2. Configure the WWDG prescaler using WWDG_SetPrescaler() function
  46. *
  47. * 3. Configure the WWDG refresh window using WWDG_SetWindowValue() function
  48. *
  49. * 4. Set the WWDG counter value and start it using WWDG_Enable() function.
  50. * When the WWDG is enabled the counter value should be configured to
  51. * a value greater than 0x40 to prevent generating an immediate reset.
  52. *
  53. * 5. Optionally you can enable the Early wakeup interrupt which is
  54. * generated when the counter reach 0x40.
  55. * Once enabled this interrupt cannot be disabled except by a system reset.
  56. *
  57. * 6. Then the application program must refresh the WWDG counter at regular
  58. * intervals during normal operation to prevent an MCU reset, using
  59. * WWDG_SetCounter() function. This operation must occur only when
  60. * the counter value is lower than the refresh window value,
  61. * programmed using WWDG_SetWindowValue().
  62. *
  63. * @endverbatim
  64. *
  65. ******************************************************************************
  66. * @attention
  67. *
  68. * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
  69. *
  70. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  71. * You may not use this file except in compliance with the License.
  72. * You may obtain a copy of the License at:
  73. *
  74. * http://www.st.com/software_license_agreement_liberty_v2
  75. *
  76. * Unless required by applicable law or agreed to in writing, software
  77. * distributed under the License is distributed on an "AS IS" BASIS,
  78. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  79. * See the License for the specific language governing permissions and
  80. * limitations under the License.
  81. *
  82. ******************************************************************************
  83. */
  84. /* Includes ------------------------------------------------------------------*/
  85. #include "stm32f4xx_wwdg.h"
  86. #include "stm32f4xx_rcc.h"
  87. /** @addtogroup STM32F4xx_StdPeriph_Driver
  88. * @{
  89. */
  90. /** @defgroup WWDG
  91. * @brief WWDG driver modules
  92. * @{
  93. */
  94. /* Private typedef -----------------------------------------------------------*/
  95. /* Private define ------------------------------------------------------------*/
  96. /* ----------- WWDG registers bit address in the alias region ----------- */
  97. #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
  98. /* Alias word address of EWI bit */
  99. #define CFR_OFFSET (WWDG_OFFSET + 0x04)
  100. #define EWI_BitNumber 0x09
  101. #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
  102. /* --------------------- WWDG registers bit mask ------------------------ */
  103. /* CFR register bit mask */
  104. #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
  105. #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
  106. #define BIT_MASK ((uint8_t)0x7F)
  107. /* Private macro -------------------------------------------------------------*/
  108. /* Private variables ---------------------------------------------------------*/
  109. /* Private function prototypes -----------------------------------------------*/
  110. /* Private functions ---------------------------------------------------------*/
  111. /** @defgroup WWDG_Private_Functions
  112. * @{
  113. */
  114. /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
  115. * @brief Prescaler, Refresh window and Counter configuration functions
  116. *
  117. @verbatim
  118. ===============================================================================
  119. Prescaler, Refresh window and Counter configuration functions
  120. ===============================================================================
  121. @endverbatim
  122. * @{
  123. */
  124. /**
  125. * @brief Deinitializes the WWDG peripheral registers to their default reset values.
  126. * @param None
  127. * @retval None
  128. */
  129. void WWDG_DeInit(void)
  130. {
  131. RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
  132. RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
  133. }
  134. /**
  135. * @brief Sets the WWDG Prescaler.
  136. * @param WWDG_Prescaler: specifies the WWDG Prescaler.
  137. * This parameter can be one of the following values:
  138. * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
  139. * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
  140. * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
  141. * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
  142. * @retval None
  143. */
  144. void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
  145. {
  146. uint32_t tmpreg = 0;
  147. /* Check the parameters */
  148. assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
  149. /* Clear WDGTB[1:0] bits */
  150. tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
  151. /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
  152. tmpreg |= WWDG_Prescaler;
  153. /* Store the new value */
  154. WWDG->CFR = tmpreg;
  155. }
  156. /**
  157. * @brief Sets the WWDG window value.
  158. * @param WindowValue: specifies the window value to be compared to the downcounter.
  159. * This parameter value must be lower than 0x80.
  160. * @retval None
  161. */
  162. void WWDG_SetWindowValue(uint8_t WindowValue)
  163. {
  164. __IO uint32_t tmpreg = 0;
  165. /* Check the parameters */
  166. assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
  167. /* Clear W[6:0] bits */
  168. tmpreg = WWDG->CFR & CFR_W_MASK;
  169. /* Set W[6:0] bits according to WindowValue value */
  170. tmpreg |= WindowValue & (uint32_t) BIT_MASK;
  171. /* Store the new value */
  172. WWDG->CFR = tmpreg;
  173. }
  174. /**
  175. * @brief Enables the WWDG Early Wakeup interrupt(EWI).
  176. * @note Once enabled this interrupt cannot be disabled except by a system reset.
  177. * @param None
  178. * @retval None
  179. */
  180. void WWDG_EnableIT(void)
  181. {
  182. *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
  183. }
  184. /**
  185. * @brief Sets the WWDG counter value.
  186. * @param Counter: specifies the watchdog counter value.
  187. * This parameter must be a number between 0x40 and 0x7F (to prevent generating
  188. * an immediate reset)
  189. * @retval None
  190. */
  191. void WWDG_SetCounter(uint8_t Counter)
  192. {
  193. /* Check the parameters */
  194. assert_param(IS_WWDG_COUNTER(Counter));
  195. /* Write to T[6:0] bits to configure the counter value, no need to do
  196. a read-modify-write; writing a 0 to WDGA bit does nothing */
  197. WWDG->CR = Counter & BIT_MASK;
  198. }
  199. /**
  200. * @}
  201. */
  202. /** @defgroup WWDG_Group2 WWDG activation functions
  203. * @brief WWDG activation functions
  204. *
  205. @verbatim
  206. ===============================================================================
  207. WWDG activation function
  208. ===============================================================================
  209. @endverbatim
  210. * @{
  211. */
  212. /**
  213. * @brief Enables WWDG and load the counter value.
  214. * @param Counter: specifies the watchdog counter value.
  215. * This parameter must be a number between 0x40 and 0x7F (to prevent generating
  216. * an immediate reset)
  217. * @retval None
  218. */
  219. void WWDG_Enable(uint8_t Counter)
  220. {
  221. /* Check the parameters */
  222. assert_param(IS_WWDG_COUNTER(Counter));
  223. WWDG->CR = WWDG_CR_WDGA | Counter;
  224. }
  225. /**
  226. * @}
  227. */
  228. /** @defgroup WWDG_Group3 Interrupts and flags management functions
  229. * @brief Interrupts and flags management functions
  230. *
  231. @verbatim
  232. ===============================================================================
  233. Interrupts and flags management functions
  234. ===============================================================================
  235. @endverbatim
  236. * @{
  237. */
  238. /**
  239. * @brief Checks whether the Early Wakeup interrupt flag is set or not.
  240. * @param None
  241. * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
  242. */
  243. FlagStatus WWDG_GetFlagStatus(void)
  244. {
  245. FlagStatus bitstatus = RESET;
  246. if ((WWDG->SR) != (uint32_t)RESET)
  247. {
  248. bitstatus = SET;
  249. }
  250. else
  251. {
  252. bitstatus = RESET;
  253. }
  254. return bitstatus;
  255. }
  256. /**
  257. * @brief Clears Early Wakeup interrupt flag.
  258. * @param None
  259. * @retval None
  260. */
  261. void WWDG_ClearFlag(void)
  262. {
  263. WWDG->SR = (uint32_t)RESET;
  264. }
  265. /**
  266. * @}
  267. */
  268. /**
  269. * @}
  270. */
  271. /**
  272. * @}
  273. */
  274. /**
  275. * @}
  276. */
  277. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/