/** ****************************************************************************** * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.c * @author MCD Application Team * @version V1.5.0 * @date 06-March-2015 * @brief Main Interrupt Service Routines. * This file provides template for all exceptions handler and * peripherals interrupt service routine. ****************************************************************************** * @attention * *

© COPYRIGHT 2015 STMicroelectronics

* * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); * You may not use this file except in compliance with the License. * You may obtain a copy of the License at: * * http://www.st.com/software_license_agreement_liberty_v2 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_it.h" //#include "usart.h" /* Scheduler includes */ #include "FreeRTOS.h" #include "task.h" #include "queue.h" #include "semphr.h" extern SemaphoreHandle_t s_xSemaphore; /* We can use Web only with libc stdio (PRINTF=stdlib) */ #include "stm32f4x7_eth.h" /* lwip includes */ #include "lwip/sys.h" #ifdef PRINTF_STDLIB #include #endif #ifdef PRINTF_CUSTOM #include "tinystdio.h" #endif /** @addtogroup Template_Project * @{ */ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ /* Private functions ---------------------------------------------------------*/ /******************************************************************************/ /* Cortex-M4 Processor Exceptions Handlers */ /******************************************************************************/ /** * @brief This function handles NMI exception. * @param None * @retval None */ void NMI_Handler(void) { } void **HARDFAULT_PSP; register void *stack_pointer asm("sp"); void HardFault_Output(uint32_t *sp) { // Hijack the process stack pointer to make backtrace work asm("mrs %0, psp" : "=r"(HARDFAULT_PSP) : :); stack_pointer = HARDFAULT_PSP; // call our debugger asm("bkpt #0"); uint32_t r0 = sp[0]; uint32_t r1 = sp[1]; uint32_t r2 = sp[2]; uint32_t r3 = sp[3]; uint32_t r12 = sp[4]; uint32_t lr = sp[5]; uint32_t pc = sp[6]; uint32_t psr = sp[7]; printf("HardFault:\n\r"); /* Print CFSR register */ /* Print CPU registers */ printf("\n\rRegisters:\n\r"); printf("SP 0x%08lx\n\r", (uint32_t)sp); printf("R0 0x%08lx\n\r", r0); printf("R1 0x%08lx\n\r", r1); printf("R2 0x%08lx\n\r", r2); printf("R3 0x%08lx\n\r", r3); printf("R12 0x%08lx\n\r", r12); printf("LR 0x%08lx\n\r", lr); printf("PC 0x%08lx\n\r", pc); printf("PSR 0x%08lx\n\r", psr); /* Go to infinite loop when Hard Fault exception occurs */ while(1); } /** * @brief This function handles Hard Fault exception. * @param None * @retval None */ #if defined ( __GNUC__ ) __attribute__( (naked) ) void HardFault_Handler(void) { __asm volatile ( "tst lr, #4 \n" "ite eq \n" "mrseq r0, msp \n" "mrsne r0, psp \n" "ldr r1, debugHardfault_address \n" "bx r1 \n" "debugHardfault_address: .word HardFault_Output \n" ); } #endif /** * @brief This function handles Memory Manage exception. * @param None * @retval None */ void MemManage_Handler(void) { /* Go to infinite loop when Memory Manage exception occurs */ while (1) { } } /*void TIM8_UP_TIM13_IRQHandler(void) { TIM_ClearITPendingBit(TIM13, TIM_IT_Update); }*/ /** * @brief This function handles Bus Fault exception. * @param None * @retval None */ void BusFault_Handler(void) { /* Go to infinite loop when Bus Fault exception occurs */ while (1) { } } /** * @brief This function handles Usage Fault exception. * @param None * @retval None */ void UsageFault_Handler(void) { /* Go to infinite loop when Usage Fault exception occurs */ while (1) { } } /** * @brief This function handles SVCall exception. * @param None * @retval None */ /* void SVC_Handler(void) { } */ /** * @brief This function handles Debug Monitor exception. * @param None * @retval None */ void DebugMon_Handler(void) { } /** * @brief This function handles PendSVC exception. * @param None * @retval None */ /*void PendSV_Handler(void) { } */ /** * @brief This function handles SysTick Handler. * @param None * @retval None */ /*void SysTick_Handler(void) { TimingDelay_Decrement(); } */ /******************************************************************************/ /* STM32F4xx Peripherals Interrupt Handlers */ /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ /* available peripheral interrupt handler's name please refer to the startup */ /* file (startup_stm32f4xx.s). */ /******************************************************************************/ /** * @brief This function handles PPP interrupt request. * @param None * @retval None */ /*void PPP_IRQHandler(void) { }*/ void SDIO_IRQHandler(void) { /* Process All SDIO Interrupt Sources */ // SD_ProcessIRQSrc(); } /** * @brief This function handles DMA2 Stream3 or DMA2 Stream6 global interrupts * requests. * @param None * @retval None */ void SD_SDIO_DMA_IRQHANDLER(void) { /* Process DMA2 Stream3 or DMA2 Stream6 Interrupt Sources */ // SD_ProcessDMAIRQ(); } //#ifdef OS_FREERTOS /** * @brief This function handles ethernet DMA interrupt request. * @param None * @retval None */ void ETH_IRQHandler(void) { portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; /* Frame received */ if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET) { /* Give the semaphore to wakeup LwIP task */ xSemaphoreGiveFromISR( s_xSemaphore, &xHigherPriorityTaskWoken ); } /* Clear the interrupt flags. */ /* Clear the Eth DMA Rx IT pending bits */ ETH_DMAClearITPendingBit(ETH_DMA_IT_R); ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS); // Switch tasks if necessary. */ if( xHigherPriorityTaskWoken != pdFALSE ) { portEND_SWITCHING_ISR( xHigherPriorityTaskWoken ); } } //#endif //#endif /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/