obsidian/Artery-testing.md

Artery

![[ARM_JTAG_SWD_Header.png]]

Ethernet

PC_1 - DC (+) PA_2 - DIO (+) PA_1 - EINT (+) PA_7 - CRSDV (+) PC_4 - RXD0 (+) PC_5 - RXD1 (+) PB_11 - TXEN (+) PB_12 - TXD0 (+) PB_13 - TXD1 (+) PA_8 - MCO (+) PE_13 - EnRST

#define PHY_ADDRESS (0x01) #define PHY_CONTROL_REG (0x00) #define PHY_STATUS_REG (0x01)

![[phy_reg1.PNG]]