|
|
@@ -8,4 +8,15 @@ AT403AVGT7 1024KB, 96+128 KB of SRAM
|
|
|
- GPIOA_4 - f_CLIN напряжение на выходе повышающего преобразователя и на входе ограничителя тока
|
|
|
- GPIOB_1 - f_MPOINT - средняя точка супер-конденсаторов
|
|
|
|
|
|
-Возможен вариант платы с 4-я аналоговыми входами
|
|
|
+Возможен вариант платы с 4-я аналоговыми входами
|
|
|
+
|
|
|
+#### <font color = "MediumSeaGreen">Low-power modes</font>
|
|
|
+
|
|
|
+The AT32F403A supports three low-power modes to achieve the best compromise between low-power consumption, short startup time and available wakeup sources:
|
|
|
+- Sleep mode
|
|
|
+In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs.
|
|
|
+- Stop mode
|
|
|
+Stop mode achieves the lowest power consumption while retaining the content of SRAM and registers. All clocks in the 1.2 V domain are stopped, the PLL, the HSI RC and the HSE crystal oscillators are disabled. The voltage regulator is put in normal mode. The device can be woken up from Stop mode by any of the EXTI line. The EXTI line source can be one of the 16 external lines, the PVD output, the RTC alarm, or the USB wakeup.
|
|
|
+- Standby mode
|
|
|
+The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire 1.2 V domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, SRAM and register contents are lost except for registers in the Backup domain and Standby circuitry. The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC alarm occurs.
|
|
|
+Note: The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop or Standby mode.
|
