TelenkovDmitry 1 年間 前
コミット
b67ad72db1

+ 13 - 49
.obsidian/workspace.json

@@ -4,23 +4,11 @@
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@@ -30,17 +18,16 @@
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@@ -50,7 +37,7 @@
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@@ -107,31 +94,7 @@
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@@ -145,19 +108,20 @@
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     "metrolog/IRQ + FreeRTOS.md",
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+ 2 - 0
BT7000/BT-7000 Artery.md

@@ -20,6 +20,8 @@ Stop mode achieves the lowest power consumption while retaining the content of S
 -  Standby mode  
 The Standby mode is used to achieve the lowest power consumption. The internal voltage  regulator is switched off so that the entire 1.2 V domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, SRAM and  register contents are lost except for registers in the Backup domain and Standby circuitry.  The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC alarm occurs.  
 Note: The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop or Standby mode.
+![[AT_power_domain.PNG]]
+![[AT_current_consumptions.PNG]]
 ---
 #### <font color = "MediumSeaGreen">Sleep mode. Разное.</font>
 - В старом арбитре все пины переводятся в состояние GPIO_MODE_IN_FLOATING кроме: PA_3, PA_4, PC_4, PC_5

BIN
img/AT_current_consumptions.PNG


BIN
img/AT_power_domain.PNG