RF24_spi1.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521
  1. /*
  2. 25.10.2020 ad0x0
  3. */
  4. #include "RF24.h"
  5. #include "../spi/ad0x0_spi1.h"
  6. #include "../admisc/ad0x0_timman.h"
  7. #include "../usart/ad0x0_usart.h"
  8. #include "../spi/ad0x0_spi_ext.h"
  9. #include <string.h>
  10. rf24_spi_regs_t *p_spi1_regs;
  11. static pipe_data_t pipes_spi1[6];//пока для для rx и для tx одинаковые ПЕРЕДЕЛАТЬ!!!!!!!!!!!
  12. static pipe_data_t pipe_musor;
  13. static uint8_t ad0x0_enable_irq=0;
  14. static uint32_t last_tx_irq_tick=0;
  15. static uint16_t tx_in_frame=0,rx_in_frame=0,frame_max_ms=250;
  16. static uint32_t frame_start_tick=0;
  17. static int16_t ad0x0_rssi=100;//,ad0x0_rssi_max_count=1000;
  18. static uint32_t get_frame_ms(uint32_t _tick_start){
  19. uint32_t t=(HAL_GetTick()<_tick_start)
  20. ?((uint64_t)HAL_GetTick()+UINT32_MAX-_tick_start)
  21. :(HAL_GetTick()-_tick_start);
  22. return t;
  23. }
  24. static packet_data_t *get_pipe_packet_buf(uint8_t _pipe_index){
  25. return &pipes_spi1[_pipe_index].packet;
  26. }
  27. static packet_data_ack_t *get_pipe_ack_buf(uint8_t _pipe_index){
  28. return &pipes_spi1[_pipe_index].packet_ack;
  29. }
  30. static pipe_data_t *get_pipe_buf(uint8_t _pipe_index){
  31. return pipes_spi1 + _pipe_index;
  32. }
  33. static uint8_t scan_data[130];// 128 + в конце \n\0
  34. static uint8_t scan_cur_ch;
  35. //rf24_regs_t r_regs;
  36. void rf24_spi1_powerUp(void)
  37. {
  38. p_spi1_regs->set_ce(1);
  39. write_register_bits(&p_spi1_regs->_CONFIG, (1 << PWR_UP),0xff);
  40. }
  41. void rf24_spi1_powerDown(void)
  42. {
  43. write_register_bits(&p_spi1_regs->_CONFIG, 0x0,~(1 << PWR_UP));
  44. p_spi1_regs->set_ce(0);
  45. }
  46. void rf24_spi1_enableRXPipe(uint8_t _pipe_index,uint8_t _payload_size,bool _enable_AutoAck,bool _enable_DYN_PL){
  47. if(_pipe_index>5)ad0x0_err();
  48. //pipes_spi1[_pipe_index].bytes_count_packet=_payload_size;
  49. write_register_bits(&p_spi1_regs->_EN_RXADDR,(1<<_pipe_index),~(1<<_pipe_index));
  50. switch(_pipe_index){
  51. case 0: write_register(&p_spi1_regs->_RX_PW_P0,_payload_size);break;
  52. case 1: write_register(&p_spi1_regs->_RX_PW_P1,_payload_size);break;
  53. case 2: write_register(&p_spi1_regs->_RX_PW_P2,_payload_size);break;
  54. case 3: write_register(&p_spi1_regs->_RX_PW_P3,_payload_size);break;
  55. case 4: write_register(&p_spi1_regs->_RX_PW_P4,_payload_size);break;
  56. case 5: write_register(&p_spi1_regs->_RX_PW_P5,_payload_size);break;
  57. default: ad0x0_err();
  58. }
  59. write_register_bits(&p_spi1_regs->_DYNPD, (1<<_pipe_index),~(1<<_pipe_index));//Enable dynamic payload length data pipe 0.
  60. write_register_bits(&p_spi1_regs->_EN_AA, (1<<_pipe_index),~(1<<_pipe_index));//
  61. }
  62. void rf24_spi1_setRateAndPA(rf24_datarate_e speed,rf24_pa_dbm_e _power)
  63. {
  64. /*[RF_DR_LOW,RF_DR_HIGH]
  65. ‘00’ – 1Mbps
  66. ‘01’ – 2Mbps
  67. ‘10’ – 250kbps
  68. Set RF output power in TX mode
  69. '00' – -18dBm
  70. '01' – -12dBm
  71. '10' – -6dBm
  72. '11' – 0dBm*/
  73. uint8_t PA_and_Rate_clr_masr=~((1 << RF_DR_LOW) | (1 << RF_DR_HIGH) | 0x3);
  74. if(_power>3)ad0x0_err();
  75. if(speed==RF24_250KBPS)write_register_bits(&p_spi1_regs->_RF_SETUP, (1 << RF_DR_LOW)|_power,PA_and_Rate_clr_masr);else
  76. if(speed==RF24_2MBPS)write_register_bits(&p_spi1_regs->_RF_SETUP, (1 << RF_DR_HIGH)|_power,PA_and_Rate_clr_masr);else
  77. if(speed==RF24_1MBPS)write_register_bits(&p_spi1_regs->_RF_SETUP, _power,PA_and_Rate_clr_masr);else ad0x0_err();
  78. }
  79. /*‘0000’ – Wait 250µS
  80. ‘0001’ – Wait 500µS
  81. ‘0010’ – Wait 750µS
  82. ……..
  83. ‘1111’ – Wait 4000µS
  84. Auto Retransmit Count
  85. ‘0000’ –Re-Transmit disabled
  86. ‘0001’ – Up to 1 Re-Transmit on fail of AA
  87. ……
  88. ‘1111’ – Up to 15 Re-Transmit on fail of AA*/
  89. void rf24_spi1_setRetransmission(uint8_t delay, uint8_t count)
  90. {
  91. // write_register(SETUP_RETR, (delay&0xf)<<ARD | (count&0xf)<<ARC);
  92. //write_register(&ad0x0_SETUP_RETR,(delay&0xf)<<ARD | (count&0xf)<<ARC);
  93. write_register(&p_spi1_regs->_SETUP_RETR,(delay&0xf)<<ARD | (count&0xf)<<ARC);
  94. }
  95. enum{
  96. xSCAN_INIT,
  97. xSCAN_NEXT
  98. };
  99. static void cb_scan_channels(uint8_t _sf_id,ad0x0_spi_desc_s *pdspi,void *p_spi_ext_t){
  100. ad0x0_spi_ext_t *p_ext=(ad0x0_spi_ext_t*)p_spi_ext_t;
  101. static void (*p_cb_func_return)(uint8_t _sf_id,ad0x0_spi_desc_s *pdspi,void *p_spi_ext_t);
  102. static uint8_t sf_id_return;
  103. switch(_sf_id){
  104. case xSCAN_INIT:
  105. scan_cur_ch=0;
  106. sf_id_return=(uint8_t)p_ext->user_data0;
  107. p_cb_func_return=(p_ext_func_t)p_ext->user_pointer1;
  108. p_spi1_regs->powerUp();
  109. p_spi1_regs->set_ce(1);
  110. p_spi1_regs->ad0x0_spi_push(ADQS_DELAY_MS,2);
  111. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xSCAN_NEXT,cb_scan_channels);
  112. break;
  113. case xSCAN_NEXT:
  114. scan_data[scan_cur_ch]=p_spi1_regs->_RPD.value ? '1' : '0';
  115. scan_cur_ch++;
  116. //write_register(&r_spi_regs._CONFIG,(1<<PWR_UP)|(1<<PRIM_RX));
  117. //PTX!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  118. //write_register(&p_spi1_regs->_CONFIG,(1<<PWR_UP));//PTX!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  119. write_register(&p_spi1_regs->_RF_CH,scan_cur_ch);
  120. p_spi1_regs->ad0x0_spi_push(ADQS_DELAY_MS,1);
  121. read_register(&p_spi1_regs->_RPD);
  122. if(scan_cur_ch>=127){
  123. scan_cur_ch=0;
  124. p_spi1_regs->powerDown();
  125. p_spi1_regs->set_ce(0);
  126. if(ad0x0_usart_isReady())ad0x0_usart_txstr(scan_data);
  127. p_spi1_regs->ad0x0_spi_push_ext_setfunc(sf_id_return,p_cb_func_return);
  128. }else{
  129. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xSCAN_NEXT,cb_scan_channels);
  130. }
  131. break;
  132. default:
  133. ad0x0_err();
  134. }
  135. }
  136. void rf24_spi1_scan_channels(uint8_t _sf_id,void (*_p_cb_func)(uint8_t _sf_id,ad0x0_spi_desc_s *pdspi,void *p_spi_ext_t)){
  137. //rf24_set_ce(1);
  138. p_spi1_regs->set_ce(1);
  139. scan_cur_ch=0;
  140. //p_spi1_regs->ad0x0_spi_push_ext_setfunc(0,cb_scan_channels);
  141. uint8_t h_ext;
  142. ad0x0_spi_ext_t *p_spi_ext_t=NULL;
  143. p_spi1_regs->ad0x0_spi_get_ext_async2(&h_ext,(void**)&p_spi_ext_t);//получить ячейку, ассоциированную с командой в очереди
  144. p_spi_ext_t->sf_id=xSCAN_INIT;
  145. p_spi_ext_t->user_data0=(uint32_t)_sf_id;
  146. p_spi_ext_t->user_pointer1=_p_cb_func;
  147. p_spi_ext_t->_p_post_cb_func = cb_scan_channels;
  148. p_spi1_regs->ad0x0_spi_push(ADQS_USE_EXT,h_ext);
  149. }
  150. /*_payload_size получается чтением из спи: read_register(&r_spi1_regs._R_RX_PL_WID);
  151. _ack_payload_size - определяет PRX*/
  152. static void PRX_readPayload_transmitAck(uint8_t _pipe_index,uint8_t _payload_size, uint8_t _ack_payload_size){
  153. pipes_spi1[_pipe_index].bytes_count_packet=_payload_size;
  154. pipes_spi1[_pipe_index].spi_cmd=R_RX_PAYLOAD;
  155. p_spi1_regs->ad0x0_spi_push_txrx_dma_ext((uint8_t*)&pipes_spi1[_pipe_index].spi_cmd,(uint8_t*)&pipes_spi1[_pipe_index].spi_cmd,pipes_spi1[_pipe_index].bytes_count_packet+1);
  156. //делать до прерывания!!!! ПЕРЕДЕЛАТЬ!!!!!!
  157. pipes_spi1[_pipe_index].bytes_count_ack=_ack_payload_size;
  158. pipes_spi1[_pipe_index].packet_ack.id=pipes_spi1[_pipe_index].packet.id;
  159. pipes_spi1[_pipe_index].spi_cmd_ack=W_ACK_PAYLOAD | _pipe_index;
  160. p_spi1_regs->ad0x0_spi_push_txrx_dma_ext((uint8_t*)&pipes_spi1[_pipe_index].spi_cmd_ack,(uint8_t*)&pipe_musor.spi_cmd_ack,_ack_payload_size+1);
  161. rx_in_frame++;
  162. }
  163. static void PTX_transmit_pipe(uint8_t _pipe_index){
  164. pipes_spi1[_pipe_index].spi_cmd=W_TX_PAYLOAD;
  165. p_spi1_regs->ad0x0_spi_push_txrx_dma_ext((uint8_t*)&pipes_spi1[_pipe_index].spi_cmd,(uint8_t*)&pipe_musor.spi_cmd,sizeof(packet_data_t)+1);
  166. pipes_spi1[_pipe_index].packet.id++;
  167. tx_in_frame++;
  168. }
  169. static void PTX_read_Ack(uint8_t _pipe_index,uint8_t _ack_payload_size){
  170. if(_pipe_index>5)ad0x0_err();//дадада, всю херню отслеживаем,
  171. pipes_spi1[_pipe_index].bytes_count_ack=_ack_payload_size;
  172. pipes_spi1[_pipe_index].spi_cmd_ack=R_RX_PAYLOAD;
  173. p_spi1_regs->ad0x0_spi_push_txrx_dma_ext((uint8_t*)&pipes_spi1[_pipe_index].spi_cmd_ack,(uint8_t*)&pipes_spi1[_pipe_index].spi_cmd_ack,
  174. pipes_spi1[_pipe_index].bytes_count_ack+1);
  175. rx_in_frame++;
  176. }
  177. static uint32_t get_last_tx_irq_ms(void){
  178. uint32_t t=(HAL_GetTick()<last_tx_irq_tick)
  179. ?((uint64_t)HAL_GetTick()+UINT32_MAX-last_tx_irq_tick)
  180. :(HAL_GetTick()-last_tx_irq_tick);
  181. return t;
  182. }
  183. static void init_pipes(void){
  184. if(sizeof(packet_data_t)!=32)ad0x0_err();
  185. for(uint8_t i=0;i<6;i++){
  186. pipes_spi1[i].bytes_count_packet=sizeof(packet_data_t);
  187. memset((void*)&pipes_spi1[i].packet,0,sizeof(packet_data_t));
  188. pipes_spi1[i].bytes_count_ack=sizeof(packet_data_ack_t);
  189. memset((void*)&pipes_spi1[i].packet_ack,0,sizeof(packet_data_ack_t));
  190. }
  191. }
  192. void rf24_spi1_set_ce(uint8_t _isHigh){
  193. extern void rf24_set_ce(rf24_spi_regs_t *p, uint8_t _isHigh);
  194. rf24_set_ce(p_spi1_regs, _isHigh);
  195. }
  196. void rf24_spi1_cmd(uint8_t _cmd){
  197. extern void spi_cmd(rf24_spi_regs_t *p, uint8_t _val);
  198. spi_cmd(p_spi1_regs, _cmd);
  199. }
  200. enum{
  201. xNRF24_PTX,
  202. xNRF24_PRX,
  203. xNRF24_RESET,
  204. xNRF24_ENABLE_PIPES,
  205. xNRF24_FEATURE,
  206. xNRF24_END,
  207. xNRF24_SCAN,
  208. xNRF24_PWR_UP_AND_CE
  209. };
  210. static void rf24_init_cb(uint8_t _sf_id,ad0x0_spi_desc_s *pdspi,void *p_spi_ext_t){
  211. static bool isPRX=false;
  212. switch(_sf_id){
  213. case xNRF24_PRX:
  214. isPRX=true;
  215. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_RESET,rf24_init_cb);
  216. break;
  217. case xNRF24_PTX:
  218. isPRX=false;
  219. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_RESET,rf24_init_cb);
  220. break;
  221. case xNRF24_RESET:
  222. p_spi1_regs->powerDown();
  223. p_spi1_regs->set_ce(0);
  224. p_spi1_regs->ad0x0_spi_push(ADQS_DELAY_MS,2);
  225. write_register(&p_spi1_regs->_CONFIG, 0x0C); // Reset NRF_CONFIG and enable 16-bit CRC.
  226. //In 250kbps mode (even when the payload is not in ACK) the ARD must be 500µS or more
  227. write_register(&p_spi1_regs->_FEATURE, (1<<EN_DPL)|(1<<EN_ACK_PAY)|(1<<EN_DYN_ACK));
  228. /*эта скотина при отладке оставляет флаги прерываний, если их не очистить,
  229. то новые прерывания не вызовутся*/
  230. write_register(&p_spi1_regs->_STATUS, 0x7E);
  231. p_spi1_regs->setRetransmission(15,0);//нет повторным попыткам
  232. p_spi1_regs->setRateAndPA(RF24_250KBPS,RF24_PA_MIN);
  233. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_FEATURE,rf24_init_cb);
  234. break;
  235. case xNRF24_FEATURE:
  236. __asm("nop");
  237. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_SCAN,rf24_init_cb);
  238. break;
  239. case xNRF24_SCAN:
  240. rf24_spi1_scan_channels(xNRF24_ENABLE_PIPES,rf24_init_cb);
  241. break;
  242. case xNRF24_ENABLE_PIPES:
  243. __asm("nop");
  244. p_spi1_regs->enableRXPipe(0x0,sizeof(packet_data_ack_t),true,true);
  245. p_spi1_regs->enableRXPipe(0x1,sizeof(packet_data_ack_t),true,true);
  246. p_spi1_regs->spi_cmd(FLUSH_TX);
  247. p_spi1_regs->spi_cmd(FLUSH_RX);
  248. write_register(&p_spi1_regs->_STATUS, 0x7E);
  249. read_register5(&p_spi1_regs->_RX_ADDR_P0);
  250. read_register5(&p_spi1_regs->_RX_ADDR_P1);
  251. read_register5(&p_spi1_regs->_TX_ADDR);
  252. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_PWR_UP_AND_CE,rf24_init_cb);
  253. break;
  254. case xNRF24_PWR_UP_AND_CE:
  255. //uint8_t cfg = read_register(NRF_CONFIG);
  256. // if not powered up then power up and wait for the radio to initialize
  257. write_register(&p_spi1_regs->_RF_CH,0x40);//канал 64
  258. p_spi1_regs->powerUp();
  259. p_spi1_regs->set_ce(1);
  260. p_spi1_regs->ad0x0_spi_push(ADQS_DELAY_MS,2);
  261. //rf24_start_tx();
  262. //rf24_start_rx();
  263. if(isPRX)p_spi1_regs->PRX_start(0,8);else p_spi1_regs->PTX_start(0);
  264. //write_register(&p_spi1_regs->_STATUS, 0x7E);
  265. read_register(&p_spi1_regs->_FIFO_STATUS);
  266. read_register(&p_spi1_regs->_STATUS);
  267. break;
  268. default:
  269. ad0x0_err();
  270. }
  271. }
  272. //------------------------------------------------
  273. enum{
  274. xNRF24_IRQ_RX,
  275. xNRF24_IRQ_RX_READ_OK
  276. };
  277. void rf24_spi1_irq_rx(uint8_t _sf_id,ad0x0_spi_desc_s *pdspi,void *p_spi_ext_t){
  278. //3723080032124353354B4E00
  279. static uint8_t rx_pipe=0xFF;
  280. switch(_sf_id){
  281. case xNRF24_IRQ_RX:
  282. if(p_spi1_regs->_STATUS.value & (1<<TX_DS)){//ad0x0_err();//на этом этапе ниче не отправляем
  283. //это в ответочку на W_ACK_PAYLOAD приходит, сбрасывам флажок
  284. tx_in_frame++;
  285. write_register_bits(&p_spi1_regs->_STATUS,(1<<TX_DS),0xFF);
  286. }
  287. if(p_spi1_regs->_STATUS.value & (1<<MAX_RT)){//ad0x0_err();//на этом этапе ниче не отправляем
  288. p_spi1_regs->spi_cmd(FLUSH_TX);
  289. write_register_bits(&p_spi1_regs->_STATUS,(1<<MAX_RT),0xFF);
  290. }
  291. if(p_spi1_regs->_STATUS.value & (1<<TX_FULL)){//ad0x0_err();//на этом этапе ниче не отправляем
  292. p_spi1_regs->spi_cmd(FLUSH_TX);
  293. write_register_bits(&p_spi1_regs->_STATUS,(1<<TX_FULL),0xFF);
  294. }
  295. //
  296. if(p_spi1_regs->_STATUS.value & (1<<RX_DR)){
  297. rx_pipe=(p_spi1_regs->_STATUS.value>>1) & 0x5;//RX_P_NO 3:1,
  298. if(rx_pipe>5)ad0x0_err();//дадада, всю херню отслеживаем,
  299. if(rx_pipe<=5){
  300. p_spi1_regs->PRX_readPayload_transmitAck(rx_pipe,p_spi1_regs->_R_RX_PL_WID.value,sizeof(packet_data_ack_t));
  301. }
  302. //write_register_bits(&p_spi1_regs->_STATUS,(1<<RX_DR),0xFF);
  303. // read_register(&p_spi1_regs->_CONFIG);
  304. // read_register(&p_spi1_regs->_OBSERVE_TX);
  305. read_register(&p_spi1_regs->_FIFO_STATUS);
  306. read_register(&p_spi1_regs->_STATUS);
  307. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_IRQ_RX_READ_OK,rf24_spi1_irq_rx);
  308. //write_register_bits(&p_spi1_regs->_CONFIG,(1<<PRIM_RX),0xFF);
  309. }//else ad0x0_err();
  310. break;
  311. case xNRF24_IRQ_RX_READ_OK:
  312. //write_register(&p_spi1_regs->_STATUS,0xE);//ПЕРЕДЕЛАТЬ!!! сброс битов прерываний
  313. //if(p_spi1_regs->_FIFO_STATUS.value & (1<<RX_EMPTY)){
  314. if( (p_spi1_regs->_STATUS.value & 0xE)==0xE){
  315. onRF24DataReady(p_spi1_regs->get_pipe_buf(rx_pipe));
  316. if(ad0x0_usart_isReady())ad0x0_usart_txbuf(p_spi1_regs->get_pipe_packet_buf(rx_pipe),p_spi1_regs->_R_RX_PL_WID.value);//прям в ком порт
  317. write_register_bits(&p_spi1_regs->_STATUS,(1<<RX_DR),0xFF);
  318. }else{
  319. read_register(&p_spi1_regs->_R_RX_PL_WID);
  320. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_IRQ_RX,rf24_spi1_irq_rx);
  321. }
  322. /*if(rx_in_frame>=ad0x0_rssi_max_count){
  323. ad0x0_rssi=tx_in_frame;
  324. tx_in_frame=rx_in_frame=0;
  325. } */
  326. //if(ad0x0_usart_isReady())ad0x0_usart_txbuf(&pipes_spi1[rx_pipe].packet,pipes_spi1[rx_pipe].bytes_count_packet);//прям в ком порт
  327. break;
  328. default:
  329. ad0x0_err();
  330. }
  331. }
  332. //------------------------------------------------
  333. enum{
  334. xNRF24_IRQ_TX,
  335. xNRF24_IRQ_TX_OK
  336. };
  337. static void rf24_irq_tx_cb(uint8_t _sf_id,ad0x0_spi_desc_s *pdspi,void *p_spi_ext_t){
  338. //2E0703002C135737334D4E00
  339. static uint8_t rx_pipe=0xFF;
  340. switch(_sf_id){
  341. case xNRF24_IRQ_TX:
  342. /*как я понял, передать на отправку пакет нужно максимально быстро*/
  343. if(p_spi1_regs->_FIFO_STATUS.value & (1<<4/*TX_EMPTY*/)){
  344. if(p_spi1_regs->_FIFO_STATUS.value & (1<<5/*TX_FULL*/)){
  345. __ASM("nop");
  346. }else{
  347. p_spi1_regs->PTX_transmit_pipe(0);
  348. }
  349. //write_register_bits(&p_spi1_regs->_STATUS,(1<<TX_DS),0xFF);
  350. }
  351. //RX_DR==1 для PTX означает что прикатил ACK от PRX
  352. if(!(p_spi1_regs->_FIFO_STATUS.value & (1<<0/*RX_EMPTY*/))){
  353. rx_pipe=(p_spi1_regs->_STATUS.value>>1) & 0x5;//RX_P_NO 3:1,
  354. p_spi1_regs->PTX_read_Ack(rx_pipe,p_spi1_regs->_R_RX_PL_WID.value);
  355. }
  356. if(p_spi1_regs->_OBSERVE_TX.value){
  357. __ASM("nop");
  358. }
  359. if(p_spi1_regs->_STATUS.value & (1<<MAX_RT)){
  360. //p_spi1_regs->spi_cmd(FLUSH_TX);
  361. //p_spi1_regs->PTX_transmit_pipe(0);
  362. //write_register_bits(&p_spi1_regs->_STATUS,(1<<MAX_RT),0xFF);
  363. }
  364. //read_register(&p_spi1_regs->_OBSERVE_TX);
  365. read_register(&p_spi1_regs->_FIFO_STATUS);
  366. read_register(&p_spi1_regs->_STATUS);
  367. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_IRQ_TX_OK,rf24_irq_tx_cb);
  368. break;
  369. case xNRF24_IRQ_TX_OK:
  370. if( (p_spi1_regs->_STATUS.value & 0xE)==0xE){
  371. write_register_bits(&p_spi1_regs->_STATUS,(1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT),0xFF);
  372. if(rx_pipe<6)onRF24DataReady(p_spi1_regs->get_pipe_buf(rx_pipe));
  373. if(p_spi1_regs->_STATUS.value & (1<<TX_DS)){
  374. // write_register_bits(&p_spi1_regs->_STATUS,(1<<TX_DS),0xFF);
  375. }
  376. }else{
  377. read_register(&p_spi1_regs->_R_RX_PL_WID);
  378. read_register(&p_spi1_regs->_FIFO_STATUS);
  379. read_register(&p_spi1_regs->_STATUS);
  380. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_IRQ_RX,rf24_irq_tx_cb);
  381. }
  382. /*if(tx_in_frame>=ad0x0_rssi_max_count){
  383. ad0x0_rssi=rx_in_frame;
  384. tx_in_frame=rx_in_frame=0;
  385. } */
  386. break;
  387. default:
  388. ad0x0_err();
  389. }
  390. }
  391. //------------------------------------------------
  392. void ad0x0_rf24_spi1_irq(void){
  393. if(!ad0x0_enable_irq){
  394. return;
  395. }
  396. read_register(&p_spi1_regs->_STATUS);//!!!не убирать нахрен это отсюда
  397. read_register(&p_spi1_regs->_FIFO_STATUS);
  398. read_register(&p_spi1_regs->_R_RX_PL_WID);
  399. if(p_spi1_regs->_CONFIG.value & (1<<PRIM_RX)){
  400. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_IRQ_RX,rf24_spi1_irq_rx);
  401. }else{
  402. last_tx_irq_tick=HAL_GetTick();
  403. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_IRQ_TX,rf24_irq_tx_cb);
  404. }
  405. }
  406. uint8_t spi1_wakeup(){
  407. if(get_frame_ms(frame_start_tick)>frame_max_ms){
  408. if(p_spi1_regs->_CONFIG.value & (1<<PRIM_RX)){
  409. ad0x0_rssi=rx_in_frame;
  410. }else{
  411. if(get_last_tx_irq_ms()>50){
  412. ad0x0_rf24_spi1_irq();
  413. }
  414. last_tx_irq_tick=HAL_GetTick();
  415. ad0x0_rssi=tx_in_frame;
  416. }
  417. ad0x0_rssi=tx_in_frame;
  418. tx_in_frame=rx_in_frame=0;
  419. frame_start_tick=HAL_GetTick();
  420. }
  421. return 0;
  422. }
  423. static void PTX_start(uint8_t _pipe_index){
  424. ad0x0_enable_irq=1;
  425. write_register_bits(&p_spi1_regs->_CONFIG,0x0,~(1<<PRIM_RX));
  426. PTX_transmit_pipe(_pipe_index);
  427. ad0x0_timman_add(10,spi1_wakeup);
  428. }
  429. static void PRX_start(uint8_t _pipe_index,uint8_t _ack_payload_size){
  430. ad0x0_enable_irq=1;
  431. write_register_bits(&p_spi1_regs->_CONFIG,(1<<PRIM_RX),0xFF);
  432. p_spi1_regs->enableRXPipe(_pipe_index,_ack_payload_size,true,true);
  433. ad0x0_timman_add(10,spi1_wakeup);
  434. }
  435. static void PTX_init(void){
  436. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_PTX,rf24_init_cb);
  437. }
  438. static void PRX_init(void){
  439. p_spi1_regs->ad0x0_spi_push_ext_setfunc(xNRF24_PRX,rf24_init_cb);
  440. }
  441. static uint8_t get_rssi(void){
  442. return ad0x0_rssi;
  443. }
  444. void rf24_init_spi1_regs(rf24_spi_regs_t *p,GPIO_TypeDef *rf24_CE_GPIO_Port, uint16_t rf24_CE_Pin){
  445. extern void rf24_init_spi_regs(rf24_spi_regs_t *p);
  446. rf24_init_spi_regs(p);
  447. p_spi1_regs=p;
  448. p->CE_GPIO_Port=rf24_CE_GPIO_Port;
  449. p->CE_Pin=rf24_CE_Pin;
  450. p->ad0x0_spi_get_ext_async2=ad0x0_spi1_get_ext_async2;
  451. p->ad0x0_spi_push=ad0x0_spi1_push;
  452. p->ad0x0_spi_push_ext_setfunc=ad0x0_spi1_push_ext_setfunc;
  453. p->ad0x0_spi_push_txrx_dma_ext=ad0x0_spi1_push_txrx_dma_ext;
  454. p->ad0x0_spi_push_tx_pbuf_dma_ext=ad0x0_spi1_push_tx_pbuf_dma_ext;
  455. p->ad0x0_spi_push_tx_pbuf_ext=ad0x0_spi1_push_tx_pbuf_ext;
  456. p->powerUp=rf24_spi1_powerUp;
  457. p->powerDown=rf24_spi1_powerDown;
  458. p->set_ce=rf24_spi1_set_ce;
  459. p->enableRXPipe=rf24_spi1_enableRXPipe;
  460. p->setRateAndPA=rf24_spi1_setRateAndPA;
  461. p->setRetransmission=rf24_spi1_setRetransmission;
  462. p->spi_cmd=rf24_spi1_cmd;
  463. p->PRX_readPayload_transmitAck=PRX_readPayload_transmitAck;
  464. p->get_pipe_packet_buf=get_pipe_packet_buf;
  465. p->get_pipe_ack_buf=get_pipe_ack_buf;
  466. p->get_pipe_buf=get_pipe_buf;
  467. p->PTX_transmit_pipe=PTX_transmit_pipe;
  468. p->PRX_start=PRX_start;
  469. p->PTX_start=PTX_start;
  470. p->init_pipes=init_pipes;
  471. p->PTX_read_Ack=PTX_read_Ack;
  472. p->PRX_init=PRX_init;
  473. p->PTX_init=PTX_init;
  474. p->get_rssi=get_rssi;
  475. //init_pipes();
  476. memset((void*)scan_data,0,sizeof(scan_data));
  477. scan_data[128]='\n';
  478. }