stm32g0xx_hal_cryp.c 194 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32g0xx_hal_cryp.c
  4. * @author MCD Application Team
  5. * @brief CRYP HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Cryptography (CRYP) peripheral:
  8. * + Initialization, de-initialization, set config and get config functions
  9. * + AES processing functions
  10. * + DMA callback functions
  11. * + CRYP IRQ handler management
  12. * + Peripheral State functions
  13. *
  14. ******************************************************************************
  15. * @attention
  16. *
  17. * Copyright (c) 2018 STMicroelectronics.
  18. * All rights reserved.
  19. *
  20. * This software is licensed under terms that can be found in the LICENSE file
  21. * in the root directory of this software component.
  22. * If no LICENSE file comes with this software, it is provided AS-IS.
  23. *
  24. ******************************************************************************
  25. @verbatim
  26. ==============================================================================
  27. ##### How to use this driver #####
  28. ==============================================================================
  29. [..]
  30. The CRYP HAL driver can be used in CRYP or TinyAES peripheral as follows:
  31. (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
  32. (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
  33. or __HAL_RCC_AES_CLK_ENABLE for TinyAES peripheral
  34. (##) In case of using interrupts (e.g. HAL_CRYP_Encrypt_IT())
  35. (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
  36. (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
  37. (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
  38. (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_Encrypt_DMA())
  39. (+++) Enable the DMAx interface clock using __RCC_DMAx_CLK_ENABLE()
  40. (+++) Configure and enable two DMA streams one for managing data transfer from
  41. memory to peripheral (input stream) and another stream for managing data
  42. transfer from peripheral to memory (output stream)
  43. (+++) Associate the initialized DMA handle to the CRYP DMA handle
  44. using __HAL_LINKDMA()
  45. (+++) Configure the priority and enable the NVIC for the transfer complete
  46. interrupt on the two DMA channels. The output channel should have higher
  47. priority than the input channel HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  48. (#)Initialize the CRYP according to the specified parameters :
  49. (##) The data type: 1-bit, 8-bit, 16-bit or 32-bit.
  50. (##) The key size: 128, 192 or 256.
  51. (##) The AlgoMode DES/ TDES Algorithm ECB/CBC or AES Algorithm ECB/CBC/CTR/GCM or CCM.
  52. (##) The initialization vector (counter). It is not used in ECB mode.
  53. (##) The key buffer used for encryption/decryption.
  54. (+++) In some specific configurations, the key is written by the application
  55. code out of the HAL scope. In that case, user can still resort to the
  56. HAL APIs as usual but must make sure that pKey pointer is set to NULL.
  57. (##) The DataWidthUnit field. It specifies whether the data length (or the payload length for authentication
  58. algorithms) is in words or bytes.
  59. (##) The Header used only in AES GCM and CCM Algorithm for authentication.
  60. (##) The HeaderSize providing the size of the header buffer in words or bytes,
  61. depending upon HeaderWidthUnit field.
  62. (##) The HeaderWidthUnit field. It specifies whether the header length (for authentication algorithms)
  63. is in words or bytes.
  64. (##) The B0 block is the first authentication block used only in AES CCM mode.
  65. (##) The KeyIVConfigSkip used to process several messages in a row (please see more information below).
  66. (#)Three processing (encryption/decryption) functions are available:
  67. (##) Polling mode: encryption and decryption APIs are blocking functions
  68. i.e. they process the data and wait till the processing is finished,
  69. e.g. HAL_CRYP_Encrypt & HAL_CRYP_Decrypt
  70. (##) Interrupt mode: encryption and decryption APIs are not blocking functions
  71. i.e. they process the data under interrupt,
  72. e.g. HAL_CRYP_Encrypt_IT & HAL_CRYP_Decrypt_IT
  73. (##) DMA mode: encryption and decryption APIs are not blocking functions
  74. i.e. the data transfer is ensured by DMA,
  75. e.g. HAL_CRYP_Encrypt_DMA & HAL_CRYP_Decrypt_DMA
  76. (#)When the processing function is called at first time after HAL_CRYP_Init()
  77. the CRYP peripheral is configured and processes the buffer in input.
  78. At second call, no need to Initialize the CRYP, user have to get current configuration via
  79. HAL_CRYP_GetConfig() API, then only HAL_CRYP_SetConfig() is requested to set
  80. new parameters, finally user can start encryption/decryption.
  81. (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
  82. (#)To process a single message with consecutive calls to HAL_CRYP_Encrypt() or HAL_CRYP_Decrypt()
  83. without having to configure again the Key or the Initialization Vector between each API call,
  84. the field KeyIVConfigSkip of the initialization structure must be set to CRYP_KEYIVCONFIG_ONCE.
  85. Same is true for consecutive calls of HAL_CRYP_Encrypt_IT(), HAL_CRYP_Decrypt_IT(), HAL_CRYP_Encrypt_DMA()
  86. or HAL_CRYP_Decrypt_DMA().
  87. [..]
  88. The cryptographic processor supports following standards:
  89. (#) The data encryption standard (DES) and Triple-DES (TDES) supported only by CRYP1 peripheral:
  90. (##)64-bit data block processing
  91. (##) chaining modes supported :
  92. (+++) Electronic Code Book(ECB)
  93. (+++) Cipher Block Chaining (CBC)
  94. (##) keys length supported :64-bit, 128-bit and 192-bit.
  95. (#) The advanced encryption standard (AES) supported by CRYP1 & TinyAES peripheral:
  96. (##)128-bit data block processing
  97. (##) chaining modes supported :
  98. (+++) Electronic Code Book(ECB)
  99. (+++) Cipher Block Chaining (CBC)
  100. (+++) Counter mode (CTR)
  101. (+++) Galois/counter mode (GCM/GMAC)
  102. (+++) Counter with Cipher Block Chaining-Message(CCM)
  103. (##) keys length Supported :
  104. (+++) for CRYP1 peripheral: 128-bit, 192-bit and 256-bit.
  105. (+++) for TinyAES peripheral: 128-bit and 256-bit
  106. [..]
  107. (@) Specific care must be taken to format the key and the Initialization Vector IV!
  108. [..] If the key is defined as a 128-bit long array key[127..0] = {b127 ... b0} where
  109. b127 is the MSB and b0 the LSB, the key must be stored in MCU memory
  110. (+) as a sequence of words where the MSB word comes first (occupies the
  111. lowest memory address)
  112. (++) address n+0 : 0b b127 .. b120 b119 .. b112 b111 .. b104 b103 .. b96
  113. (++) address n+4 : 0b b95 .. b88 b87 .. b80 b79 .. b72 b71 .. b64
  114. (++) address n+8 : 0b b63 .. b56 b55 .. b48 b47 .. b40 b39 .. b32
  115. (++) address n+C : 0b b31 .. b24 b23 .. b16 b15 .. b8 b7 .. b0
  116. [..] Hereafter, another illustration when considering a 128-bit long key made of 16 bytes {B15..B0}.
  117. The 4 32-bit words that make the key must be stored as follows in MCU memory:
  118. (+) address n+0 : 0x B15 B14 B13 B12
  119. (+) address n+4 : 0x B11 B10 B9 B8
  120. (+) address n+8 : 0x B7 B6 B5 B4
  121. (+) address n+C : 0x B3 B2 B1 B0
  122. [..] which leads to the expected setting
  123. (+) AES_KEYR3 = 0x B15 B14 B13 B12
  124. (+) AES_KEYR2 = 0x B11 B10 B9 B8
  125. (+) AES_KEYR1 = 0x B7 B6 B5 B4
  126. (+) AES_KEYR0 = 0x B3 B2 B1 B0
  127. [..] Same format must be applied for a 256-bit long key made of 32 bytes {B31..B0}.
  128. The 8 32-bit words that make the key must be stored as follows in MCU memory:
  129. (+) address n+00 : 0x B31 B30 B29 B28
  130. (+) address n+04 : 0x B27 B26 B25 B24
  131. (+) address n+08 : 0x B23 B22 B21 B20
  132. (+) address n+0C : 0x B19 B18 B17 B16
  133. (+) address n+10 : 0x B15 B14 B13 B12
  134. (+) address n+14 : 0x B11 B10 B9 B8
  135. (+) address n+18 : 0x B7 B6 B5 B4
  136. (+) address n+1C : 0x B3 B2 B1 B0
  137. [..] which leads to the expected setting
  138. (+) AES_KEYR7 = 0x B31 B30 B29 B28
  139. (+) AES_KEYR6 = 0x B27 B26 B25 B24
  140. (+) AES_KEYR5 = 0x B23 B22 B21 B20
  141. (+) AES_KEYR4 = 0x B19 B18 B17 B16
  142. (+) AES_KEYR3 = 0x B15 B14 B13 B12
  143. (+) AES_KEYR2 = 0x B11 B10 B9 B8
  144. (+) AES_KEYR1 = 0x B7 B6 B5 B4
  145. (+) AES_KEYR0 = 0x B3 B2 B1 B0
  146. [..] Initialization Vector IV (4 32-bit words) format must follow the same as
  147. that of a 128-bit long key.
  148. [..] Note that key and IV registers are not sensitive to swap mode selection.
  149. [..] This section describes the AES Galois/counter mode (GCM) supported by both CRYP1 and TinyAES peripherals:
  150. (#) Algorithm supported :
  151. (##) Galois/counter mode (GCM)
  152. (##) Galois message authentication code (GMAC) :is exactly the same as
  153. GCM algorithm composed only by an header.
  154. (#) Four phases are performed in GCM :
  155. (##) Init phase: peripheral prepares the GCM hash subkey (H) and do the IV processing
  156. (##) Header phase: peripheral processes the Additional Authenticated Data (AAD), with hash
  157. computation only.
  158. (##) Payload phase: peripheral processes the plaintext (P) with hash computation + keystream
  159. encryption + data XORing. It works in a similar way for ciphertext (C).
  160. (##) Final phase: peripheral generates the authenticated tag (T) using the last block of data.
  161. (#) structure of message construction in GCM is defined as below :
  162. (##) 16 bytes Initial Counter Block (ICB)composed of IV and counter
  163. (##) The authenticated header A (also knows as Additional Authentication Data AAD)
  164. this part of the message is only authenticated, not encrypted.
  165. (##) The plaintext message P is both authenticated and encrypted as ciphertext.
  166. GCM standard specifies that ciphertext has same bit length as the plaintext.
  167. (##) The last block is composed of the length of A (on 64 bits) and the length of ciphertext
  168. (on 64 bits)
  169. [..] A more detailed description of the GCM message structure is available below.
  170. [..] This section describe The AES Counter with Cipher Block Chaining-Message
  171. Authentication Code (CCM) supported by both CRYP1 and TinyAES peripheral:
  172. (#) Specific parameters for CCM :
  173. (##) B0 block : follows NIST Special Publication 800-38C,
  174. (##) B1 block (header)
  175. (##) CTRx block : control blocks
  176. [..] A detailed description of the CCM message structure is available below.
  177. (#) Four phases are performed in CCM for CRYP1 peripheral:
  178. (##) Init phase: peripheral prepares the GCM hash subkey (H) and do the IV processing
  179. (##) Header phase: peripheral processes the Additional Authenticated Data (AAD), with hash
  180. computation only.
  181. (##) Payload phase: peripheral processes the plaintext (P) with hash computation + keystream
  182. encryption + data XORing. It works in a similar way for ciphertext (C).
  183. (##) Final phase: peripheral generates the authenticated tag (T) using the last block of data.
  184. (#) CCM in TinyAES peripheral:
  185. (##) To perform message payload encryption or decryption AES is configured in CTR mode.
  186. (##) For authentication two phases are performed :
  187. - Header phase: peripheral processes the Additional Authenticated Data (AAD) first, then the cleartext message
  188. only cleartext payload (not the ciphertext payload) is used and no output.
  189. (##) Final phase: peripheral generates the authenticated tag (T) using the last block of data.
  190. *** Callback registration ***
  191. =============================
  192. [..]
  193. The compilation define USE_HAL_CRYP_REGISTER_CALLBACKS when set to 1
  194. allows the user to configure dynamically the driver callbacks.
  195. Use Functions HAL_CRYP_RegisterCallback() or HAL_CRYP_RegisterXXXCallback()
  196. to register an interrupt callback.
  197. [..]
  198. Function HAL_CRYP_RegisterCallback() allows to register following callbacks:
  199. (+) InCpltCallback : Input FIFO transfer completed callback.
  200. (+) OutCpltCallback : Output FIFO transfer completed callback.
  201. (+) ErrorCallback : callback for error detection.
  202. (+) MspInitCallback : CRYP MspInit.
  203. (+) MspDeInitCallback : CRYP MspDeInit.
  204. This function takes as parameters the HAL peripheral handle, the Callback ID
  205. and a pointer to the user callback function.
  206. [..]
  207. Use function HAL_CRYP_UnRegisterCallback() to reset a callback to the default
  208. weak function.
  209. HAL_CRYP_UnRegisterCallback() takes as parameters the HAL peripheral handle,
  210. and the Callback ID.
  211. This function allows to reset following callbacks:
  212. (+) InCpltCallback : Input FIFO transfer completed callback.
  213. (+) OutCpltCallback : Output FIFO transfer completed callback.
  214. (+) ErrorCallback : callback for error detection.
  215. (+) MspInitCallback : CRYP MspInit.
  216. (+) MspDeInitCallback : CRYP MspDeInit.
  217. [..]
  218. By default, after the HAL_CRYP_Init() and when the state is HAL_CRYP_STATE_RESET
  219. all callbacks are set to the corresponding weak functions :
  220. examples HAL_CRYP_InCpltCallback() , HAL_CRYP_OutCpltCallback().
  221. Exception done for MspInit and MspDeInit functions that are
  222. reset to the legacy weak function in the HAL_CRYP_Init()/ HAL_CRYP_DeInit() only when
  223. these callbacks are null (not registered beforehand).
  224. if not, MspInit or MspDeInit are not null, the HAL_CRYP_Init() / HAL_CRYP_DeInit()
  225. keep and use the user MspInit/MspDeInit functions (registered beforehand)
  226. [..]
  227. Callbacks can be registered/unregistered in HAL_CRYP_STATE_READY state only.
  228. Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
  229. in HAL_CRYP_STATE_READY or HAL_CRYP_STATE_RESET state,
  230. thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  231. In that case first register the MspInit/MspDeInit user callbacks
  232. using HAL_CRYP_RegisterCallback() before calling HAL_CRYP_DeInit()
  233. or HAL_CRYP_Init() function.
  234. [..]
  235. When The compilation define USE_HAL_CRYP_REGISTER_CALLBACKS is set to 0 or
  236. not defined, the callback registration feature is not available and all callbacks
  237. are set to the corresponding weak functions.
  238. *** Suspend/Resume feature ***
  239. ==============================
  240. [..]
  241. The compilation define USE_HAL_CRYP_SUSPEND_RESUME when set to 1
  242. allows the user to resort to the suspend/resume feature.
  243. A low priority block processing can be suspended to process a high priority block
  244. instead. When the high priority block processing is over, the low priority block
  245. processing can be resumed, restarting from the point where it was suspended. This
  246. feature is applicable only in non-blocking interrupt mode.
  247. [..] User must resort to HAL_CRYP_Suspend() to suspend the low priority block
  248. processing. This API manages the hardware block processing suspension and saves all the
  249. internal data that will be needed to restart later on. Upon HAL_CRYP_Suspend() completion,
  250. the user can launch the processing of any other block (high priority block processing).
  251. [..] When the high priority block processing is over, user must invoke HAL_CRYP_Resume()
  252. to resume the low priority block processing. Ciphering (or deciphering) restarts from
  253. the suspension point and ends as usual.
  254. [..] HAL_CRYP_Suspend() reports an error when the suspension request is sent too late
  255. (i.e when the low priority block processing is about to end). There is no use to
  256. suspend the tag generation processing for authentication algorithms.
  257. [..]
  258. (@) If the key is written out of HAL scope (case pKey pointer set to NULL by the user),
  259. the block processing suspension/resumption mechanism is NOT applicable.
  260. [..]
  261. (@) If the Key and Initialization Vector are configured only once and configuration is
  262. skipped for consecutive processings (case KeyIVConfigSkip set to CRYP_KEYIVCONFIG_ONCE),
  263. the block processing suspension/resumption mechanism is NOT applicable.
  264. @endverbatim
  265. ******************************************************************************
  266. */
  267. /* Includes ------------------------------------------------------------------*/
  268. #include "stm32g0xx_hal.h"
  269. /** @addtogroup STM32G0xx_HAL_Driver
  270. * @{
  271. */
  272. /** @addtogroup CRYP
  273. * @{
  274. */
  275. #if defined(AES)
  276. #ifdef HAL_CRYP_MODULE_ENABLED
  277. /* Private typedef -----------------------------------------------------------*/
  278. /* Private define ------------------------------------------------------------*/
  279. /** @addtogroup CRYP_Private_Defines
  280. * @{
  281. */
  282. #define CRYP_TIMEOUT_KEYPREPARATION 82U /* The latency of key preparation operation is 82 clock cycles.*/
  283. #define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey
  284. is 299 clock cycles.*/
  285. #define CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/
  286. #define CRYP_PHASE_READY 0x00000001U /*!< CRYP peripheral is ready for initialization. */
  287. #define CRYP_PHASE_PROCESS 0x00000002U /*!< CRYP peripheral is in processing phase */
  288. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  289. #define CRYP_PHASE_HEADER_SUSPENDED 0x00000004U /*!< GCM/GMAC/CCM header phase is suspended */
  290. #define CRYP_PHASE_PAYLOAD_SUSPENDED 0x00000005U /*!< GCM/CCM payload phase is suspended */
  291. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  292. #define CRYP_PHASE_HEADER_DMA_FEED 0x00000006U /*!< GCM/GMAC/CCM header is fed to the peripheral in DMA mode */
  293. #define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U /*!< Encryption mode(Mode 1) */
  294. #define CRYP_OPERATINGMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode only used when performing ECB and CBC decryptions (Mode 2) */
  295. #define CRYP_OPERATINGMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption (Mode 3) */
  296. #define CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption only used when performing ECB and CBC decryptions (Mode 4) */
  297. #define CRYP_PHASE_INIT 0x00000000U /*!< GCM/GMAC (or CCM) init phase */
  298. #define CRYP_PHASE_HEADER AES_CR_GCMPH_0 /*!< GCM/GMAC or CCM header phase */
  299. #define CRYP_PHASE_PAYLOAD AES_CR_GCMPH_1 /*!< GCM(/CCM) payload phase */
  300. #define CRYP_PHASE_FINAL AES_CR_GCMPH /*!< GCM/GMAC or CCM final phase */
  301. /* CTR1 information to use in CCM algorithm */
  302. #define CRYP_CCM_CTR1_0 0x07FFFFFFU
  303. #define CRYP_CCM_CTR1_1 0xFFFFFF00U
  304. #define CRYP_CCM_CTR1_2 0x00000001U
  305. /**
  306. * @}
  307. */
  308. /* Private macro -------------------------------------------------------------*/
  309. /** @addtogroup CRYP_Private_Macros
  310. * @{
  311. */
  312. #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR,\
  313. AES_CR_GCMPH, (uint32_t)(__PHASE__))
  314. /**
  315. * @}
  316. */
  317. /* Private struct -------------------------------------------------------------*/
  318. /* Private variables ---------------------------------------------------------*/
  319. /* Private function prototypes -----------------------------------------------*/
  320. /** @addtogroup CRYP_Private_Functions
  321. * @{
  322. */
  323. static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
  324. static HAL_StatusTypeDef CRYP_SetHeaderDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size);
  325. static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
  326. static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
  327. static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
  328. static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint32_t KeySize);
  329. static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp);
  330. static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  331. static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp);
  332. static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp);
  333. static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcryp);
  334. static HAL_StatusTypeDef CRYP_GCMCCM_SetPayloadPhase_DMA(CRYP_HandleTypeDef *hcryp);
  335. static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp);
  336. static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp);
  337. static HAL_StatusTypeDef CRYP_AESGCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  338. static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  339. static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp);
  340. static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp);
  341. static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcrypt, uint32_t Timeout);
  342. static HAL_StatusTypeDef CRYP_AES_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  343. static HAL_StatusTypeDef CRYP_AES_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  344. static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp);
  345. static HAL_StatusTypeDef CRYP_AES_Encrypt_IT(CRYP_HandleTypeDef *hcryp);
  346. static HAL_StatusTypeDef CRYP_AES_Decrypt_DMA(CRYP_HandleTypeDef *hcryp);
  347. static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  348. static void CRYP_ClearCCFlagWhenHigh(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  349. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  350. static void CRYP_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Output);
  351. static void CRYP_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Input);
  352. static void CRYP_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Output);
  353. static void CRYP_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Input);
  354. static void CRYP_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Output, uint32_t KeySize);
  355. static void CRYP_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint32_t KeySize);
  356. static void CRYP_PhaseProcessingResume(CRYP_HandleTypeDef *hcryp);
  357. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  358. /**
  359. * @}
  360. */
  361. /* Exported functions ---------------------------------------------------------*/
  362. /** @addtogroup CRYP_Exported_Functions
  363. * @{
  364. */
  365. /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
  366. * @brief Initialization and Configuration functions.
  367. *
  368. @verbatim
  369. ========================================================================================
  370. ##### Initialization, de-initialization and Set and Get configuration functions #####
  371. ========================================================================================
  372. [..] This section provides functions allowing to:
  373. (+) Initialize the CRYP
  374. (+) DeInitialize the CRYP
  375. (+) Initialize the CRYP MSP
  376. (+) DeInitialize the CRYP MSP
  377. (+) configure CRYP (HAL_CRYP_SetConfig) with the specified parameters in the CRYP_ConfigTypeDef
  378. Parameters which are configured in This section are :
  379. (++) Key size
  380. (++) Data Type : 32,16, 8 or 1bit
  381. (++) AlgoMode :
  382. (+++) for CRYP1 peripheral :
  383. ECB and CBC in DES/TDES Standard
  384. ECB,CBC,CTR,GCM/GMAC and CCM in AES Standard.
  385. (+++) for TinyAES2 peripheral, only ECB,CBC,CTR,GCM/GMAC and CCM in AES Standard are supported.
  386. (+) Get CRYP configuration (HAL_CRYP_GetConfig) from the specified parameters in the CRYP_HandleTypeDef
  387. @endverbatim
  388. * @{
  389. */
  390. /**
  391. * @brief Initializes the CRYP according to the specified
  392. * parameters in the CRYP_ConfigTypeDef and creates the associated handle.
  393. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  394. * the configuration information for CRYP module
  395. * @retval HAL status
  396. */
  397. HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
  398. {
  399. /* Check the CRYP handle allocation */
  400. if (hcryp == NULL)
  401. {
  402. return HAL_ERROR;
  403. }
  404. /* Check parameters */
  405. assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
  406. assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
  407. assert_param(IS_CRYP_ALGORITHM(hcryp->Init.Algorithm));
  408. assert_param(IS_CRYP_INIT(hcryp->Init.KeyIVConfigSkip));
  409. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  410. if (hcryp->State == HAL_CRYP_STATE_RESET)
  411. {
  412. /* Allocate lock resource and initialize it */
  413. hcryp->Lock = HAL_UNLOCKED;
  414. hcryp->InCpltCallback = HAL_CRYP_InCpltCallback; /* Legacy weak InCpltCallback */
  415. hcryp->OutCpltCallback = HAL_CRYP_OutCpltCallback; /* Legacy weak OutCpltCallback */
  416. hcryp->ErrorCallback = HAL_CRYP_ErrorCallback; /* Legacy weak ErrorCallback */
  417. if (hcryp->MspInitCallback == NULL)
  418. {
  419. hcryp->MspInitCallback = HAL_CRYP_MspInit; /* Legacy weak MspInit */
  420. }
  421. /* Init the low level hardware */
  422. hcryp->MspInitCallback(hcryp);
  423. }
  424. #else
  425. if (hcryp->State == HAL_CRYP_STATE_RESET)
  426. {
  427. /* Allocate lock resource and initialize it */
  428. hcryp->Lock = HAL_UNLOCKED;
  429. /* Init the low level hardware */
  430. HAL_CRYP_MspInit(hcryp);
  431. }
  432. #endif /* (USE_HAL_CRYP_REGISTER_CALLBACKS) */
  433. /* Set the key size (This bit field is do not care in the DES or TDES modes), data type and Algorithm */
  434. MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE | AES_CR_KEYSIZE | AES_CR_CHMOD,
  435. hcryp->Init.DataType | hcryp->Init.KeySize | hcryp->Init.Algorithm);
  436. /* Reset Error Code field */
  437. hcryp->ErrorCode = HAL_CRYP_ERROR_NONE;
  438. /* Reset peripheral Key and IV configuration flag */
  439. hcryp->KeyIVConfig = 0U;
  440. /* Change the CRYP state */
  441. hcryp->State = HAL_CRYP_STATE_READY;
  442. /* Set the default CRYP phase */
  443. hcryp->Phase = CRYP_PHASE_READY;
  444. /* Return function status */
  445. return HAL_OK;
  446. }
  447. /**
  448. * @brief De-Initializes the CRYP peripheral.
  449. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  450. * the configuration information for CRYP module
  451. * @retval HAL status
  452. */
  453. HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
  454. {
  455. /* Check the CRYP handle allocation */
  456. if (hcryp == NULL)
  457. {
  458. return HAL_ERROR;
  459. }
  460. /* Set the default CRYP phase */
  461. hcryp->Phase = CRYP_PHASE_READY;
  462. /* Reset CrypInCount and CrypOutCount */
  463. hcryp->CrypInCount = 0;
  464. hcryp->CrypOutCount = 0;
  465. hcryp->CrypHeaderCount = 0;
  466. /* Disable the CRYP peripheral clock */
  467. __HAL_CRYP_DISABLE(hcryp);
  468. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  469. if (hcryp->MspDeInitCallback == NULL)
  470. {
  471. hcryp->MspDeInitCallback = HAL_CRYP_MspDeInit; /* Legacy weak MspDeInit */
  472. }
  473. /* DeInit the low level hardware */
  474. hcryp->MspDeInitCallback(hcryp);
  475. #else
  476. /* DeInit the low level hardware: CLOCK, NVIC.*/
  477. HAL_CRYP_MspDeInit(hcryp);
  478. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  479. /* Change the CRYP state */
  480. hcryp->State = HAL_CRYP_STATE_RESET;
  481. /* Release Lock */
  482. __HAL_UNLOCK(hcryp);
  483. /* Return function status */
  484. return HAL_OK;
  485. }
  486. /**
  487. * @brief Configure the CRYP according to the specified
  488. * parameters in the CRYP_ConfigTypeDef
  489. * @param hcryp pointer to a CRYP_HandleTypeDef structure
  490. * @param pConf pointer to a CRYP_ConfigTypeDef structure that contains
  491. * the configuration information for CRYP module
  492. * @retval HAL status
  493. */
  494. HAL_StatusTypeDef HAL_CRYP_SetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeDef *pConf)
  495. {
  496. /* Check the CRYP handle allocation */
  497. if ((hcryp == NULL) || (pConf == NULL))
  498. {
  499. return HAL_ERROR;
  500. }
  501. /* Check parameters */
  502. assert_param(IS_CRYP_KEYSIZE(pConf->KeySize));
  503. assert_param(IS_CRYP_DATATYPE(pConf->DataType));
  504. assert_param(IS_CRYP_ALGORITHM(pConf->Algorithm));
  505. if (hcryp->State == HAL_CRYP_STATE_READY)
  506. {
  507. /* Change the CRYP state */
  508. hcryp->State = HAL_CRYP_STATE_BUSY;
  509. /* Process locked */
  510. __HAL_LOCK(hcryp);
  511. /* Set CRYP parameters */
  512. hcryp->Init.DataType = pConf->DataType;
  513. hcryp->Init.pKey = pConf->pKey;
  514. hcryp->Init.Algorithm = pConf->Algorithm;
  515. hcryp->Init.KeySize = pConf->KeySize;
  516. hcryp->Init.pInitVect = pConf->pInitVect;
  517. hcryp->Init.Header = pConf->Header;
  518. hcryp->Init.HeaderSize = pConf->HeaderSize;
  519. hcryp->Init.B0 = pConf->B0;
  520. hcryp->Init.DataWidthUnit = pConf->DataWidthUnit;
  521. hcryp->Init.HeaderWidthUnit = pConf->HeaderWidthUnit;
  522. hcryp->Init.KeyIVConfigSkip = pConf->KeyIVConfigSkip;
  523. /* Set the key size (This bit field is do not care in the DES or TDES modes), data type and operating mode*/
  524. MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE | AES_CR_KEYSIZE | AES_CR_CHMOD,
  525. hcryp->Init.DataType | hcryp->Init.KeySize | hcryp->Init.Algorithm);
  526. /*clear error flags*/
  527. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_ERR_CLEAR);
  528. /* Process Unlocked */
  529. __HAL_UNLOCK(hcryp);
  530. /* Reset Error Code field */
  531. hcryp->ErrorCode = HAL_CRYP_ERROR_NONE;
  532. /* Change the CRYP state */
  533. hcryp->State = HAL_CRYP_STATE_READY;
  534. /* Set the default CRYP phase */
  535. hcryp->Phase = CRYP_PHASE_READY;
  536. /* Return function status */
  537. return HAL_OK;
  538. }
  539. else
  540. {
  541. /* Process Unlocked */
  542. __HAL_UNLOCK(hcryp);
  543. /* Busy error code field */
  544. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  545. return HAL_ERROR;
  546. }
  547. }
  548. /**
  549. * @brief Get CRYP Configuration parameters in associated handle.
  550. * @param pConf pointer to a CRYP_ConfigTypeDef structure
  551. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  552. * the configuration information for CRYP module
  553. * @retval HAL status
  554. */
  555. HAL_StatusTypeDef HAL_CRYP_GetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeDef *pConf)
  556. {
  557. /* Check the CRYP handle allocation */
  558. if ((hcryp == NULL) || (pConf == NULL))
  559. {
  560. return HAL_ERROR;
  561. }
  562. if (hcryp->State == HAL_CRYP_STATE_READY)
  563. {
  564. /* Change the CRYP state */
  565. hcryp->State = HAL_CRYP_STATE_BUSY;
  566. /* Process locked */
  567. __HAL_LOCK(hcryp);
  568. /* Get CRYP parameters */
  569. pConf->DataType = hcryp->Init.DataType;
  570. pConf->pKey = hcryp->Init.pKey;
  571. pConf->Algorithm = hcryp->Init.Algorithm;
  572. pConf->KeySize = hcryp->Init.KeySize ;
  573. pConf->pInitVect = hcryp->Init.pInitVect;
  574. pConf->Header = hcryp->Init.Header ;
  575. pConf->HeaderSize = hcryp->Init.HeaderSize;
  576. pConf->B0 = hcryp->Init.B0;
  577. pConf->DataWidthUnit = hcryp->Init.DataWidthUnit;
  578. pConf->HeaderWidthUnit = hcryp->Init.HeaderWidthUnit;
  579. pConf->KeyIVConfigSkip = hcryp->Init.KeyIVConfigSkip;
  580. /* Process Unlocked */
  581. __HAL_UNLOCK(hcryp);
  582. /* Change the CRYP state */
  583. hcryp->State = HAL_CRYP_STATE_READY;
  584. /* Return function status */
  585. return HAL_OK;
  586. }
  587. else
  588. {
  589. /* Process Unlocked */
  590. __HAL_UNLOCK(hcryp);
  591. /* Busy error code field */
  592. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  593. return HAL_ERROR;
  594. }
  595. }
  596. /**
  597. * @brief Initializes the CRYP MSP.
  598. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  599. * the configuration information for CRYP module
  600. * @retval None
  601. */
  602. __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
  603. {
  604. /* Prevent unused argument(s) compilation warning */
  605. UNUSED(hcryp);
  606. /* NOTE : This function should not be modified; when the callback is needed,
  607. the HAL_CRYP_MspInit can be implemented in the user file
  608. */
  609. }
  610. /**
  611. * @brief DeInitializes CRYP MSP.
  612. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  613. * the configuration information for CRYP module
  614. * @retval None
  615. */
  616. __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
  617. {
  618. /* Prevent unused argument(s) compilation warning */
  619. UNUSED(hcryp);
  620. /* NOTE : This function should not be modified; when the callback is needed,
  621. the HAL_CRYP_MspDeInit can be implemented in the user file
  622. */
  623. }
  624. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  625. /**
  626. * @brief Register a User CRYP Callback
  627. * To be used instead of the weak predefined callback
  628. * @param hcryp cryp handle
  629. * @param CallbackID ID of the callback to be registered
  630. * This parameter can be one of the following values:
  631. * @arg @ref HAL_CRYP_INPUT_COMPLETE_CB_ID Input FIFO transfer completed callback ID
  632. * @arg @ref HAL_CRYP_OUTPUT_COMPLETE_CB_ID Output FIFO transfer completed callback ID
  633. * @arg @ref HAL_CRYP_ERROR_CB_ID Error callback ID
  634. * @arg @ref HAL_CRYP_MSPINIT_CB_ID MspInit callback ID
  635. * @arg @ref HAL_CRYP_MSPDEINIT_CB_ID MspDeInit callback ID
  636. * @param pCallback pointer to the Callback function
  637. * @retval status
  638. */
  639. HAL_StatusTypeDef HAL_CRYP_RegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID,
  640. pCRYP_CallbackTypeDef pCallback)
  641. {
  642. HAL_StatusTypeDef status = HAL_OK;
  643. if (pCallback == NULL)
  644. {
  645. /* Update the error code */
  646. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
  647. return HAL_ERROR;
  648. }
  649. /* Process locked */
  650. __HAL_LOCK(hcryp);
  651. if (hcryp->State == HAL_CRYP_STATE_READY)
  652. {
  653. switch (CallbackID)
  654. {
  655. case HAL_CRYP_INPUT_COMPLETE_CB_ID :
  656. hcryp->InCpltCallback = pCallback;
  657. break;
  658. case HAL_CRYP_OUTPUT_COMPLETE_CB_ID :
  659. hcryp->OutCpltCallback = pCallback;
  660. break;
  661. case HAL_CRYP_ERROR_CB_ID :
  662. hcryp->ErrorCallback = pCallback;
  663. break;
  664. case HAL_CRYP_MSPINIT_CB_ID :
  665. hcryp->MspInitCallback = pCallback;
  666. break;
  667. case HAL_CRYP_MSPDEINIT_CB_ID :
  668. hcryp->MspDeInitCallback = pCallback;
  669. break;
  670. default :
  671. /* Update the error code */
  672. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
  673. /* Return error status */
  674. status = HAL_ERROR;
  675. break;
  676. }
  677. }
  678. else if (hcryp->State == HAL_CRYP_STATE_RESET)
  679. {
  680. switch (CallbackID)
  681. {
  682. case HAL_CRYP_MSPINIT_CB_ID :
  683. hcryp->MspInitCallback = pCallback;
  684. break;
  685. case HAL_CRYP_MSPDEINIT_CB_ID :
  686. hcryp->MspDeInitCallback = pCallback;
  687. break;
  688. default :
  689. /* Update the error code */
  690. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
  691. /* Return error status */
  692. status = HAL_ERROR;
  693. break;
  694. }
  695. }
  696. else
  697. {
  698. /* Update the error code */
  699. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
  700. /* Return error status */
  701. status = HAL_ERROR;
  702. }
  703. /* Release Lock */
  704. __HAL_UNLOCK(hcryp);
  705. return status;
  706. }
  707. /**
  708. * @brief Unregister an CRYP Callback
  709. * CRYP callback is redirected to the weak predefined callback
  710. * @param hcryp cryp handle
  711. * @param CallbackID ID of the callback to be unregistered
  712. * This parameter can be one of the following values:
  713. * @arg @ref HAL_CRYP_INPUT_COMPLETE_CB_ID Input FIFO transfer completed callback ID
  714. * @arg @ref HAL_CRYP_OUTPUT_COMPLETE_CB_ID Output FIFO transfer completed callback ID
  715. * @arg @ref HAL_CRYP_ERROR_CB_ID Error callback ID
  716. * @arg @ref HAL_CRYP_MSPINIT_CB_ID MspInit callback ID
  717. * @arg @ref HAL_CRYP_MSPDEINIT_CB_ID MspDeInit callback ID
  718. * @retval status
  719. */
  720. HAL_StatusTypeDef HAL_CRYP_UnRegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID)
  721. {
  722. HAL_StatusTypeDef status = HAL_OK;
  723. /* Process locked */
  724. __HAL_LOCK(hcryp);
  725. if (hcryp->State == HAL_CRYP_STATE_READY)
  726. {
  727. switch (CallbackID)
  728. {
  729. case HAL_CRYP_INPUT_COMPLETE_CB_ID :
  730. hcryp->InCpltCallback = HAL_CRYP_InCpltCallback; /* Legacy weak InCpltCallback */
  731. break;
  732. case HAL_CRYP_OUTPUT_COMPLETE_CB_ID :
  733. hcryp->OutCpltCallback = HAL_CRYP_OutCpltCallback; /* Legacy weak OutCpltCallback */
  734. break;
  735. case HAL_CRYP_ERROR_CB_ID :
  736. hcryp->ErrorCallback = HAL_CRYP_ErrorCallback; /* Legacy weak ErrorCallback */
  737. break;
  738. case HAL_CRYP_MSPINIT_CB_ID :
  739. hcryp->MspInitCallback = HAL_CRYP_MspInit;
  740. break;
  741. case HAL_CRYP_MSPDEINIT_CB_ID :
  742. hcryp->MspDeInitCallback = HAL_CRYP_MspDeInit;
  743. break;
  744. default :
  745. /* Update the error code */
  746. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
  747. /* Return error status */
  748. status = HAL_ERROR;
  749. break;
  750. }
  751. }
  752. else if (hcryp->State == HAL_CRYP_STATE_RESET)
  753. {
  754. switch (CallbackID)
  755. {
  756. case HAL_CRYP_MSPINIT_CB_ID :
  757. hcryp->MspInitCallback = HAL_CRYP_MspInit;
  758. break;
  759. case HAL_CRYP_MSPDEINIT_CB_ID :
  760. hcryp->MspDeInitCallback = HAL_CRYP_MspDeInit;
  761. break;
  762. default :
  763. /* Update the error code */
  764. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
  765. /* Return error status */
  766. status = HAL_ERROR;
  767. break;
  768. }
  769. }
  770. else
  771. {
  772. /* Update the error code */
  773. hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;;
  774. /* Return error status */
  775. status = HAL_ERROR;
  776. }
  777. /* Release Lock */
  778. __HAL_UNLOCK(hcryp);
  779. return status;
  780. }
  781. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  782. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  783. /**
  784. * @brief Request CRYP processing suspension when in interruption mode.
  785. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  786. * the configuration information for CRYP module.
  787. * @note Set the handle field SuspendRequest to the appropriate value so that
  788. * the on-going CRYP processing is suspended as soon as the required
  789. * conditions are met.
  790. * @note HAL_CRYP_ProcessSuspend() can only be invoked when the processing is done
  791. * in non-blocking interrupt mode.
  792. * @note It is advised not to suspend the CRYP processing when the DMA controller
  793. * is managing the data transfer.
  794. * @retval None
  795. */
  796. void HAL_CRYP_ProcessSuspend(CRYP_HandleTypeDef *hcryp)
  797. {
  798. /* Set Handle SuspendRequest field */
  799. hcryp->SuspendRequest = HAL_CRYP_SUSPEND;
  800. }
  801. /**
  802. * @brief CRYP processing suspension and peripheral internal parameters storage.
  803. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  804. * the configuration information for CRYP module
  805. * @note peripheral internal parameters are stored to be readily available when
  806. * suspended processing is resumed later on.
  807. * @retval HAL status
  808. */
  809. HAL_StatusTypeDef HAL_CRYP_Suspend(CRYP_HandleTypeDef *hcryp)
  810. {
  811. HAL_CRYP_STATETypeDef state;
  812. /* Request suspension */
  813. HAL_CRYP_ProcessSuspend(hcryp);
  814. do
  815. {
  816. state = HAL_CRYP_GetState(hcryp);
  817. } while ((state != HAL_CRYP_STATE_SUSPENDED) && (state != HAL_CRYP_STATE_READY));
  818. if (HAL_CRYP_GetState(hcryp) == HAL_CRYP_STATE_READY)
  819. {
  820. /* Processing was already over or was about to end. No suspension done */
  821. return HAL_ERROR;
  822. }
  823. else
  824. {
  825. /* Suspend Processing */
  826. /* If authentication algorithms on-going, carry out first saving steps
  827. before disable the peripheral */
  828. if ((hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC) || \
  829. (hcryp->Init.Algorithm == CRYP_AES_CCM))
  830. {
  831. /* Save Suspension registers */
  832. CRYP_Read_SuspendRegisters(hcryp, hcryp->SUSPxR_saved);
  833. /* Save Key */
  834. CRYP_Read_KeyRegisters(hcryp, hcryp->Key_saved, hcryp->Init.KeySize);
  835. /* Save IV */
  836. CRYP_Read_IVRegisters(hcryp, hcryp->IV_saved);
  837. }
  838. /* Disable AES */
  839. __HAL_CRYP_DISABLE(hcryp);
  840. /* Save low-priority block CRYP handle parameters */
  841. hcryp->Init_saved = hcryp->Init;
  842. hcryp->pCrypInBuffPtr_saved = hcryp->pCrypInBuffPtr;
  843. hcryp->pCrypOutBuffPtr_saved = hcryp->pCrypOutBuffPtr;
  844. hcryp->CrypInCount_saved = hcryp->CrypInCount;
  845. hcryp->CrypOutCount_saved = hcryp->CrypOutCount;
  846. hcryp->Phase_saved = hcryp->Phase;
  847. hcryp->State_saved = hcryp->State;
  848. hcryp->Size_saved = ((hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD) ? \
  849. (hcryp->Size / 4U) : hcryp->Size);
  850. hcryp->SizesSum_saved = hcryp->SizesSum;
  851. hcryp->AutoKeyDerivation_saved = hcryp->AutoKeyDerivation;
  852. hcryp->CrypHeaderCount_saved = hcryp->CrypHeaderCount;
  853. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  854. if ((hcryp->Init.Algorithm == CRYP_AES_CBC) || \
  855. (hcryp->Init.Algorithm == CRYP_AES_CTR))
  856. {
  857. /* Save Initialisation Vector registers */
  858. CRYP_Read_IVRegisters(hcryp, hcryp->IV_saved);
  859. }
  860. /* Save Control register */
  861. hcryp->CR_saved = hcryp->Instance->CR;
  862. }
  863. return HAL_OK;
  864. }
  865. /**
  866. * @brief CRYP processing resumption.
  867. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  868. * the configuration information for CRYP module
  869. * @note Processing restarts at the exact point where it was suspended, based
  870. * on the parameters saved at suspension time.
  871. * @retval HAL status
  872. */
  873. HAL_StatusTypeDef HAL_CRYP_Resume(CRYP_HandleTypeDef *hcryp)
  874. {
  875. /* Check the CRYP handle allocation */
  876. if (hcryp == NULL)
  877. {
  878. return HAL_ERROR;
  879. }
  880. if (hcryp->State_saved != HAL_CRYP_STATE_SUSPENDED)
  881. {
  882. /* CRYP was not suspended */
  883. return HAL_ERROR;
  884. }
  885. else
  886. {
  887. /* Restore low-priority block CRYP handle parameters */
  888. hcryp->Init = hcryp->Init_saved;
  889. hcryp->State = hcryp->State_saved;
  890. /* Chaining algorithms case */
  891. if ((hcryp->Init_saved.Algorithm == CRYP_AES_ECB) || \
  892. (hcryp->Init_saved.Algorithm == CRYP_AES_CBC) || \
  893. (hcryp->Init_saved.Algorithm == CRYP_AES_CTR))
  894. {
  895. /* Restore low-priority block CRYP handle parameters */
  896. hcryp->AutoKeyDerivation = hcryp->AutoKeyDerivation_saved;
  897. if ((hcryp->Init.Algorithm == CRYP_AES_CBC) || \
  898. (hcryp->Init.Algorithm == CRYP_AES_CTR))
  899. {
  900. hcryp->Init.pInitVect = hcryp->IV_saved;
  901. }
  902. __HAL_CRYP_DISABLE(hcryp);
  903. (void) HAL_CRYP_Init(hcryp);
  904. }
  905. else /* Authentication algorithms case */
  906. {
  907. /* Restore low-priority block CRYP handle parameters */
  908. hcryp->Phase = hcryp->Phase_saved;
  909. hcryp->CrypHeaderCount = hcryp->CrypHeaderCount_saved;
  910. hcryp->SizesSum = hcryp->SizesSum_saved;
  911. /* Disable AES and write-back SUSPxR registers */;
  912. __HAL_CRYP_DISABLE(hcryp);
  913. /* Restore AES Suspend Registers */
  914. CRYP_Write_SuspendRegisters(hcryp, hcryp->SUSPxR_saved);
  915. /* Restore Control, Key and IV Registers, then enable AES */
  916. hcryp->Instance->CR = hcryp->CR_saved;
  917. CRYP_Write_KeyRegisters(hcryp, hcryp->Key_saved, hcryp->Init.KeySize);
  918. CRYP_Write_IVRegisters(hcryp, hcryp->IV_saved);
  919. /* At the same time, set handle state back to READY to be able to resume the AES calculations
  920. without the processing APIs returning HAL_BUSY when called. */
  921. hcryp->State = HAL_CRYP_STATE_READY;
  922. }
  923. /* Resume low-priority block processing under IT */
  924. hcryp->ResumingFlag = 1U;
  925. if (READ_BIT(hcryp->CR_saved, AES_CR_MODE) == CRYP_OPERATINGMODE_ENCRYPT)
  926. {
  927. if (HAL_CRYP_Encrypt_IT(hcryp, hcryp->pCrypInBuffPtr_saved, hcryp->Size_saved, \
  928. hcryp->pCrypOutBuffPtr_saved) != HAL_OK)
  929. {
  930. return HAL_ERROR;
  931. }
  932. }
  933. else
  934. {
  935. if (HAL_CRYP_Decrypt_IT(hcryp, hcryp->pCrypInBuffPtr_saved, hcryp->Size_saved, \
  936. hcryp->pCrypOutBuffPtr_saved) != HAL_OK)
  937. {
  938. return HAL_ERROR;
  939. }
  940. }
  941. }
  942. return HAL_OK;
  943. }
  944. #endif /* defined (USE_HAL_CRYP_SUSPEND_RESUME) */
  945. /**
  946. * @}
  947. */
  948. /** @defgroup CRYP_Exported_Functions_Group2 Encryption Decryption functions
  949. * @brief Encryption Decryption functions.
  950. *
  951. @verbatim
  952. ==============================================================================
  953. ##### Encrypt Decrypt functions #####
  954. ==============================================================================
  955. [..] This section provides API allowing to Encrypt/Decrypt Data following
  956. Standard DES/TDES or AES, and Algorithm configured by the user:
  957. (+) Standard DES/TDES only supported by CRYP1 peripheral, below list of Algorithm supported :
  958. - Electronic Code Book(ECB)
  959. - Cipher Block Chaining (CBC)
  960. (+) Standard AES supported by CRYP1 peripheral & TinyAES, list of Algorithm supported:
  961. - Electronic Code Book(ECB)
  962. - Cipher Block Chaining (CBC)
  963. - Counter mode (CTR)
  964. - Cipher Block Chaining (CBC)
  965. - Counter mode (CTR)
  966. - Galois/counter mode (GCM)
  967. - Counter with Cipher Block Chaining-Message(CCM)
  968. [..] Three processing functions are available:
  969. (+) Polling mode : HAL_CRYP_Encrypt & HAL_CRYP_Decrypt
  970. (+) Interrupt mode : HAL_CRYP_Encrypt_IT & HAL_CRYP_Decrypt_IT
  971. (+) DMA mode : HAL_CRYP_Encrypt_DMA & HAL_CRYP_Decrypt_DMA
  972. @endverbatim
  973. * @{
  974. */
  975. /* GCM message structure additional details
  976. ICB
  977. +-------------------------------------------------------+
  978. | Initialization vector (IV) | Counter |
  979. |----------------|----------------|-----------|---------|
  980. 127 95 63 31 0
  981. Bit Number Register Contents
  982. ---------- --------------- -----------
  983. 127 ...96 CRYP_IV1R[31:0] ICB[127:96]
  984. 95 ...64 CRYP_IV1L[31:0] B0[95:64]
  985. 63 ... 32 CRYP_IV0R[31:0] ICB[63:32]
  986. 31 ... 0 CRYP_IV0L[31:0] ICB[31:0], where 32-bit counter= 0x2
  987. GCM last block definition
  988. +-------------------------------------------------------------------+
  989. | Bit[0] | Bit[32] | Bit[64] | Bit[96] |
  990. |-----------|--------------------|-----------|----------------------|
  991. | 0x0 | Header length[31:0]| 0x0 | Payload length[31:0] |
  992. |-----------|--------------------|-----------|----------------------|
  993. */
  994. /* CCM message blocks description
  995. (##) B0 block : According to NIST Special Publication 800-38C,
  996. The first block B0 is formatted as follows, where l(m) is encoded in
  997. most-significant-byte first order:
  998. Octet Number Contents
  999. ------------ ---------
  1000. 0 Flags
  1001. 1 ... 15-q Nonce N
  1002. 16-q ... 15 Q
  1003. the Flags field is formatted as follows:
  1004. Bit Number Contents
  1005. ---------- ----------------------
  1006. 7 Reserved (always zero)
  1007. 6 Adata
  1008. 5 ... 3 (t-2)/2
  1009. 2 ... 0 [q-1]3
  1010. - Q: a bit string representation of the octet length of P (plaintext)
  1011. - q The octet length of the binary representation of the octet length of the payload
  1012. - A nonce (N), n The octet length of the where n+q=15.
  1013. - Flags: most significant octet containing four flags for control information,
  1014. - t The octet length of the MAC.
  1015. (##) B1 block (header) : associated data length(a) concatenated with Associated Data (A)
  1016. the associated data length expressed in bytes (a) defined as below:
  1017. - If 0 < a < 216-28, then it is encoded as [a]16, i.e. two octets
  1018. - If 216-28 < a < 232, then it is encoded as 0xff || 0xfe || [a]32, i.e. six octets
  1019. - If 232 < a < 264, then it is encoded as 0xff || 0xff || [a]64, i.e. ten octets
  1020. (##) CTRx block : control blocks
  1021. - Generation of CTR1 from first block B0 information :
  1022. equal to B0 with first 5 bits zeroed and most significant bits storing octet
  1023. length of P also zeroed, then incremented by one
  1024. Bit Number Register Contents
  1025. ---------- --------------- -----------
  1026. 127 ...96 CRYP_IV1R[31:0] B0[127:96], where Q length bits are set to 0, except for
  1027. bit 0 that is set to 1
  1028. 95 ...64 CRYP_IV1L[31:0] B0[95:64]
  1029. 63 ... 32 CRYP_IV0R[31:0] B0[63:32]
  1030. 31 ... 0 CRYP_IV0L[31:0] B0[31:0], where flag bits set to 0
  1031. - Generation of CTR0: same as CTR1 with bit[0] set to zero.
  1032. */
  1033. /**
  1034. * @brief Encryption mode.
  1035. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1036. * the configuration information for CRYP module
  1037. * @param Input Pointer to the input buffer (plaintext)
  1038. * @param Size Length of the plaintext buffer in bytes or words (depending upon DataWidthUnit field)
  1039. * @param Output Pointer to the output buffer(ciphertext)
  1040. * @param Timeout Specify Timeout value
  1041. * @retval HAL status
  1042. */
  1043. HAL_StatusTypeDef HAL_CRYP_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint16_t Size, uint32_t *Output,
  1044. uint32_t Timeout)
  1045. {
  1046. uint32_t algo;
  1047. HAL_StatusTypeDef status;
  1048. #ifdef USE_FULL_ASSERT
  1049. uint32_t algo_assert = (hcryp->Instance->CR) & AES_CR_CHMOD;
  1050. /* Check input buffer size */
  1051. assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
  1052. #endif /* USE_FULL_ASSERT */
  1053. if (hcryp->State == HAL_CRYP_STATE_READY)
  1054. {
  1055. /* Change state Busy */
  1056. hcryp->State = HAL_CRYP_STATE_BUSY;
  1057. /* Process locked */
  1058. __HAL_LOCK(hcryp);
  1059. /* Reset CrypInCount, CrypOutCount and Initialize pCrypInBuffPtr and pCrypOutBuffPtr parameters*/
  1060. hcryp->CrypInCount = 0U;
  1061. hcryp->CrypOutCount = 0U;
  1062. hcryp->pCrypInBuffPtr = Input;
  1063. hcryp->pCrypOutBuffPtr = Output;
  1064. /* Calculate Size parameter in Byte*/
  1065. if (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD)
  1066. {
  1067. hcryp->Size = Size * 4U;
  1068. }
  1069. else
  1070. {
  1071. hcryp->Size = Size;
  1072. }
  1073. /* Set the operating mode*/
  1074. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_ENCRYPT);
  1075. /* algo get algorithm selected */
  1076. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  1077. switch (algo)
  1078. {
  1079. case CRYP_AES_ECB:
  1080. case CRYP_AES_CBC:
  1081. case CRYP_AES_CTR:
  1082. /* AES encryption */
  1083. status = CRYP_AES_Encrypt(hcryp, Timeout);
  1084. break;
  1085. case CRYP_AES_GCM_GMAC:
  1086. /* AES GCM encryption */
  1087. status = CRYP_AESGCM_Process(hcryp, Timeout) ;
  1088. break;
  1089. case CRYP_AES_CCM:
  1090. /* AES CCM encryption */
  1091. status = CRYP_AESCCM_Process(hcryp, Timeout);
  1092. break;
  1093. default:
  1094. hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED;
  1095. status = HAL_ERROR;
  1096. break;
  1097. }
  1098. if (status == HAL_OK)
  1099. {
  1100. /* Change the CRYP peripheral state */
  1101. hcryp->State = HAL_CRYP_STATE_READY;
  1102. /* Process unlocked */
  1103. __HAL_UNLOCK(hcryp);
  1104. }
  1105. }
  1106. else
  1107. {
  1108. /* Busy error code field */
  1109. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  1110. status = HAL_ERROR;
  1111. }
  1112. /* Return function status */
  1113. return status;
  1114. }
  1115. /**
  1116. * @brief Decryption mode.
  1117. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1118. * the configuration information for CRYP module
  1119. * @param Input Pointer to the input buffer (ciphertext )
  1120. * @param Size Length of the plaintext buffer in bytes or words (depending upon DataWidthUnit field)
  1121. * @param Output Pointer to the output buffer(plaintext)
  1122. * @param Timeout Specify Timeout value
  1123. * @retval HAL status
  1124. */
  1125. HAL_StatusTypeDef HAL_CRYP_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint16_t Size, uint32_t *Output,
  1126. uint32_t Timeout)
  1127. {
  1128. HAL_StatusTypeDef status;
  1129. uint32_t algo;
  1130. #ifdef USE_FULL_ASSERT
  1131. uint32_t algo_assert = (hcryp->Instance->CR) & AES_CR_CHMOD;
  1132. /* Check input buffer size */
  1133. assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
  1134. #endif /* USE_FULL_ASSERT */
  1135. if (hcryp->State == HAL_CRYP_STATE_READY)
  1136. {
  1137. /* Change state Busy */
  1138. hcryp->State = HAL_CRYP_STATE_BUSY;
  1139. /* Process locked */
  1140. __HAL_LOCK(hcryp);
  1141. /* Reset CrypInCount, CrypOutCount and Initialize pCrypInBuffPtr and pCrypOutBuffPtr parameters*/
  1142. hcryp->CrypInCount = 0U;
  1143. hcryp->CrypOutCount = 0U;
  1144. hcryp->pCrypInBuffPtr = Input;
  1145. hcryp->pCrypOutBuffPtr = Output;
  1146. /* Calculate Size parameter in Byte*/
  1147. if (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD)
  1148. {
  1149. hcryp->Size = Size * 4U;
  1150. }
  1151. else
  1152. {
  1153. hcryp->Size = Size;
  1154. }
  1155. /* Set Decryption operating mode*/
  1156. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_DECRYPT);
  1157. /* algo get algorithm selected */
  1158. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  1159. switch (algo)
  1160. {
  1161. case CRYP_AES_ECB:
  1162. case CRYP_AES_CBC:
  1163. case CRYP_AES_CTR:
  1164. /* AES decryption */
  1165. status = CRYP_AES_Decrypt(hcryp, Timeout);
  1166. break;
  1167. case CRYP_AES_GCM_GMAC:
  1168. /* AES GCM decryption */
  1169. status = CRYP_AESGCM_Process(hcryp, Timeout) ;
  1170. break;
  1171. case CRYP_AES_CCM:
  1172. /* AES CCM decryption */
  1173. status = CRYP_AESCCM_Process(hcryp, Timeout);
  1174. break;
  1175. default:
  1176. hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED;
  1177. status = HAL_ERROR;
  1178. break;
  1179. }
  1180. if (status == HAL_OK)
  1181. {
  1182. /* Change the CRYP peripheral state */
  1183. hcryp->State = HAL_CRYP_STATE_READY;
  1184. /* Process unlocked */
  1185. __HAL_UNLOCK(hcryp);
  1186. }
  1187. }
  1188. else
  1189. {
  1190. /* Busy error code field */
  1191. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  1192. status = HAL_ERROR;
  1193. }
  1194. /* Return function status */
  1195. return status;
  1196. }
  1197. /**
  1198. * @brief Encryption in interrupt mode.
  1199. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1200. * the configuration information for CRYP module
  1201. * @param Input Pointer to the input buffer (plaintext)
  1202. * @param Size Length of the plaintext buffer in bytes or words (depending upon DataWidthUnit field)
  1203. * @param Output Pointer to the output buffer(ciphertext)
  1204. * @retval HAL status
  1205. */
  1206. HAL_StatusTypeDef HAL_CRYP_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint16_t Size, uint32_t *Output)
  1207. {
  1208. HAL_StatusTypeDef status;
  1209. uint32_t algo;
  1210. #ifdef USE_FULL_ASSERT
  1211. uint32_t algo_assert = (hcryp->Instance->CR) & AES_CR_CHMOD;
  1212. /* Check input buffer size */
  1213. assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
  1214. #endif /* USE_FULL_ASSERT */
  1215. if (hcryp->State == HAL_CRYP_STATE_READY)
  1216. {
  1217. /* Change state Busy */
  1218. hcryp->State = HAL_CRYP_STATE_BUSY;
  1219. /* Process locked */
  1220. __HAL_LOCK(hcryp);
  1221. /* Reset CrypInCount, CrypOutCount and Initialize pCrypInBuffPtr and pCrypOutBuffPtr parameters*/
  1222. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  1223. if (hcryp->ResumingFlag == 1U)
  1224. {
  1225. hcryp->ResumingFlag = 0U;
  1226. if (hcryp->Phase != CRYP_PHASE_HEADER_SUSPENDED)
  1227. {
  1228. hcryp->CrypInCount = (uint16_t) hcryp->CrypInCount_saved;
  1229. hcryp->CrypOutCount = (uint16_t) hcryp->CrypOutCount_saved;
  1230. }
  1231. else
  1232. {
  1233. hcryp->CrypInCount = 0U;
  1234. hcryp->CrypOutCount = 0U;
  1235. }
  1236. }
  1237. else
  1238. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  1239. {
  1240. hcryp->CrypInCount = 0U;
  1241. hcryp->CrypOutCount = 0U;
  1242. }
  1243. hcryp->pCrypInBuffPtr = Input;
  1244. hcryp->pCrypOutBuffPtr = Output;
  1245. /* Calculate Size parameter in Byte*/
  1246. if (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD)
  1247. {
  1248. hcryp->Size = Size * 4U;
  1249. }
  1250. else
  1251. {
  1252. hcryp->Size = Size;
  1253. }
  1254. /* Set encryption operating mode*/
  1255. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_ENCRYPT);
  1256. /* algo get algorithm selected */
  1257. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  1258. switch (algo)
  1259. {
  1260. case CRYP_AES_ECB:
  1261. case CRYP_AES_CBC:
  1262. case CRYP_AES_CTR:
  1263. /* AES encryption */
  1264. status = CRYP_AES_Encrypt_IT(hcryp);
  1265. break;
  1266. case CRYP_AES_GCM_GMAC:
  1267. /* AES GCM encryption */
  1268. status = CRYP_AESGCM_Process_IT(hcryp) ;
  1269. break;
  1270. case CRYP_AES_CCM:
  1271. /* AES CCM encryption */
  1272. status = CRYP_AESCCM_Process_IT(hcryp);
  1273. break;
  1274. default:
  1275. hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED;
  1276. status = HAL_ERROR;
  1277. break;
  1278. }
  1279. }
  1280. else
  1281. {
  1282. /* Busy error code field */
  1283. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  1284. status = HAL_ERROR;
  1285. }
  1286. /* Return function status */
  1287. return status;
  1288. }
  1289. /**
  1290. * @brief Decryption in interrupt mode.
  1291. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1292. * the configuration information for CRYP module
  1293. * @param Input Pointer to the input buffer (ciphertext )
  1294. * @param Size Length of the plaintext buffer in bytes or words (depending upon DataWidthUnit field)
  1295. * @param Output Pointer to the output buffer(plaintext)
  1296. * @retval HAL status
  1297. */
  1298. HAL_StatusTypeDef HAL_CRYP_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint16_t Size, uint32_t *Output)
  1299. {
  1300. HAL_StatusTypeDef status;
  1301. uint32_t algo;
  1302. #ifdef USE_FULL_ASSERT
  1303. uint32_t algo_assert = (hcryp->Instance->CR) & AES_CR_CHMOD;
  1304. /* Check input buffer size */
  1305. assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
  1306. #endif /* USE_FULL_ASSERT */
  1307. if (hcryp->State == HAL_CRYP_STATE_READY)
  1308. {
  1309. /* Change state Busy */
  1310. hcryp->State = HAL_CRYP_STATE_BUSY;
  1311. /* Process locked */
  1312. __HAL_LOCK(hcryp);
  1313. /* Reset CrypInCount, CrypOutCount and Initialize pCrypInBuffPtr and pCrypOutBuffPtr parameters*/
  1314. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  1315. if (hcryp->ResumingFlag == 1U)
  1316. {
  1317. hcryp->ResumingFlag = 0U;
  1318. if (hcryp->Phase != CRYP_PHASE_HEADER_SUSPENDED)
  1319. {
  1320. hcryp->CrypInCount = (uint16_t) hcryp->CrypInCount_saved;
  1321. hcryp->CrypOutCount = (uint16_t) hcryp->CrypOutCount_saved;
  1322. }
  1323. else
  1324. {
  1325. hcryp->CrypInCount = 0U;
  1326. hcryp->CrypOutCount = 0U;
  1327. }
  1328. }
  1329. else
  1330. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  1331. {
  1332. hcryp->CrypInCount = 0U;
  1333. hcryp->CrypOutCount = 0U;
  1334. }
  1335. hcryp->pCrypInBuffPtr = Input;
  1336. hcryp->pCrypOutBuffPtr = Output;
  1337. /* Calculate Size parameter in Byte*/
  1338. if (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD)
  1339. {
  1340. hcryp->Size = Size * 4U;
  1341. }
  1342. else
  1343. {
  1344. hcryp->Size = Size;
  1345. }
  1346. /* Set decryption operating mode*/
  1347. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_DECRYPT);
  1348. /* algo get algorithm selected */
  1349. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  1350. switch (algo)
  1351. {
  1352. case CRYP_AES_ECB:
  1353. case CRYP_AES_CBC:
  1354. case CRYP_AES_CTR:
  1355. /* AES decryption */
  1356. status = CRYP_AES_Decrypt_IT(hcryp);
  1357. break;
  1358. case CRYP_AES_GCM_GMAC:
  1359. /* AES GCM decryption */
  1360. status = CRYP_AESGCM_Process_IT(hcryp) ;
  1361. break;
  1362. case CRYP_AES_CCM:
  1363. /* AES CCM decryption */
  1364. status = CRYP_AESCCM_Process_IT(hcryp);
  1365. break;
  1366. default:
  1367. hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED;
  1368. status = HAL_ERROR;
  1369. break;
  1370. }
  1371. }
  1372. else
  1373. {
  1374. /* Busy error code field */
  1375. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  1376. status = HAL_ERROR;
  1377. }
  1378. /* Return function status */
  1379. return status;
  1380. }
  1381. /**
  1382. * @brief Encryption in DMA mode.
  1383. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1384. * the configuration information for CRYP module
  1385. * @param Input Pointer to the input buffer (plaintext)
  1386. * @param Size Length of the plaintext buffer in bytes or words (depending upon DataWidthUnit field)
  1387. * @param Output Pointer to the output buffer(ciphertext)
  1388. * @retval HAL status
  1389. */
  1390. HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint16_t Size, uint32_t *Output)
  1391. {
  1392. HAL_StatusTypeDef status;
  1393. uint32_t algo;
  1394. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  1395. #ifdef USE_FULL_ASSERT
  1396. uint32_t algo_assert = (hcryp->Instance->CR) & AES_CR_CHMOD;
  1397. /* Check input buffer size */
  1398. assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
  1399. #endif /* USE_FULL_ASSERT */
  1400. if (hcryp->State == HAL_CRYP_STATE_READY)
  1401. {
  1402. /* Change state Busy */
  1403. hcryp->State = HAL_CRYP_STATE_BUSY;
  1404. /* Process locked */
  1405. __HAL_LOCK(hcryp);
  1406. /* Reset CrypInCount, CrypOutCount and Initialize pCrypInBuffPtr and pCrypOutBuffPtr parameters*/
  1407. hcryp->CrypInCount = 0U;
  1408. hcryp->CrypOutCount = 0U;
  1409. hcryp->pCrypInBuffPtr = Input;
  1410. hcryp->pCrypOutBuffPtr = Output;
  1411. /* Calculate Size parameter in Byte*/
  1412. if (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD)
  1413. {
  1414. hcryp->Size = Size * 4U;
  1415. }
  1416. else
  1417. {
  1418. hcryp->Size = Size;
  1419. }
  1420. /* Set encryption operating mode*/
  1421. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_ENCRYPT);
  1422. /* algo get algorithm selected */
  1423. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  1424. switch (algo)
  1425. {
  1426. case CRYP_AES_ECB:
  1427. case CRYP_AES_CBC:
  1428. case CRYP_AES_CTR:
  1429. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  1430. {
  1431. if (hcryp->KeyIVConfig == 1U)
  1432. {
  1433. /* If the Key and IV configuration has to be done only once
  1434. and if it has already been done, skip it */
  1435. DoKeyIVConfig = 0U;
  1436. }
  1437. else
  1438. {
  1439. /* If the Key and IV configuration has to be done only once
  1440. and if it has not been done already, do it and set KeyIVConfig
  1441. to keep track it won't have to be done again next time */
  1442. hcryp->KeyIVConfig = 1U;
  1443. }
  1444. }
  1445. if (DoKeyIVConfig == 1U)
  1446. {
  1447. /* Set the Key*/
  1448. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1449. /* Set the Initialization Vector*/
  1450. if (hcryp->Init.Algorithm != CRYP_AES_ECB)
  1451. {
  1452. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  1453. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  1454. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  1455. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  1456. }
  1457. } /* if (DoKeyIVConfig == 1U) */
  1458. /* Set the phase */
  1459. hcryp->Phase = CRYP_PHASE_PROCESS;
  1460. /* Start DMA process transfer for AES */
  1461. CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), \
  1462. (uint32_t)(hcryp->pCrypOutBuffPtr));
  1463. status = HAL_OK;
  1464. break;
  1465. case CRYP_AES_GCM_GMAC:
  1466. /* AES GCM encryption */
  1467. status = CRYP_AESGCM_Process_DMA(hcryp) ;
  1468. break;
  1469. case CRYP_AES_CCM:
  1470. /* AES CCM encryption */
  1471. status = CRYP_AESCCM_Process_DMA(hcryp);
  1472. break;
  1473. default:
  1474. hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED;
  1475. status = HAL_ERROR;
  1476. break;
  1477. }
  1478. }
  1479. else
  1480. {
  1481. /* Busy error code field */
  1482. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  1483. status = HAL_ERROR;
  1484. }
  1485. /* Return function status */
  1486. return status;
  1487. }
  1488. /**
  1489. * @brief Decryption in DMA mode.
  1490. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1491. * the configuration information for CRYP module
  1492. * @param Input Pointer to the input buffer (ciphertext )
  1493. * @param Size Length of the plaintext buffer in bytes or words (depending upon DataWidthUnit field)
  1494. * @param Output Pointer to the output buffer(plaintext)
  1495. * @retval HAL status
  1496. */
  1497. HAL_StatusTypeDef HAL_CRYP_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint16_t Size, uint32_t *Output)
  1498. {
  1499. HAL_StatusTypeDef status;
  1500. uint32_t algo;
  1501. #ifdef USE_FULL_ASSERT
  1502. uint32_t algo_assert = (hcryp->Instance->CR) & AES_CR_CHMOD;
  1503. /* Check input buffer size */
  1504. assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
  1505. #endif /* USE_FULL_ASSERT */
  1506. if (hcryp->State == HAL_CRYP_STATE_READY)
  1507. {
  1508. /* Change state Busy */
  1509. hcryp->State = HAL_CRYP_STATE_BUSY;
  1510. /* Process locked */
  1511. __HAL_LOCK(hcryp);
  1512. /* Reset CrypInCount, CrypOutCount and Initialize pCrypInBuffPtr, pCrypOutBuffPtr and Size parameters*/
  1513. hcryp->CrypInCount = 0U;
  1514. hcryp->CrypOutCount = 0U;
  1515. hcryp->pCrypInBuffPtr = Input;
  1516. hcryp->pCrypOutBuffPtr = Output;
  1517. /* Calculate Size parameter in Byte*/
  1518. if (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD)
  1519. {
  1520. hcryp->Size = Size * 4U;
  1521. }
  1522. else
  1523. {
  1524. hcryp->Size = Size;
  1525. }
  1526. /* Set decryption operating mode*/
  1527. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_DECRYPT);
  1528. /* algo get algorithm selected */
  1529. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  1530. switch (algo)
  1531. {
  1532. case CRYP_AES_ECB:
  1533. case CRYP_AES_CBC:
  1534. case CRYP_AES_CTR:
  1535. /* AES decryption */
  1536. status = CRYP_AES_Decrypt_DMA(hcryp);
  1537. break;
  1538. case CRYP_AES_GCM_GMAC:
  1539. /* AES GCM decryption */
  1540. status = CRYP_AESGCM_Process_DMA(hcryp) ;
  1541. break;
  1542. case CRYP_AES_CCM:
  1543. /* AES CCM decryption */
  1544. status = CRYP_AESCCM_Process_DMA(hcryp);
  1545. break;
  1546. default:
  1547. hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED;
  1548. status = HAL_ERROR;
  1549. break;
  1550. }
  1551. }
  1552. else
  1553. {
  1554. /* Busy error code field */
  1555. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  1556. status = HAL_ERROR;
  1557. }
  1558. /* Return function status */
  1559. return status;
  1560. }
  1561. /**
  1562. * @}
  1563. */
  1564. /** @defgroup CRYP_Exported_Functions_Group3 CRYP IRQ handler management
  1565. * @brief CRYP IRQ handler.
  1566. *
  1567. @verbatim
  1568. ==============================================================================
  1569. ##### CRYP IRQ handler management #####
  1570. ==============================================================================
  1571. [..] This section provides CRYP IRQ handler and callback functions.
  1572. (+) HAL_CRYP_IRQHandler CRYP interrupt request
  1573. (+) HAL_CRYP_InCpltCallback input data transfer complete callback
  1574. (+) HAL_CRYP_OutCpltCallback output data transfer complete callback
  1575. (+) HAL_CRYP_ErrorCallback CRYP error callback
  1576. (+) HAL_CRYP_GetState return the CRYP state
  1577. (+) HAL_CRYP_GetError return the CRYP error code
  1578. @endverbatim
  1579. * @{
  1580. */
  1581. /**
  1582. * @brief This function handles cryptographic interrupt request.
  1583. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1584. * the configuration information for CRYP module
  1585. * @retval None
  1586. */
  1587. void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
  1588. {
  1589. uint32_t itsource = hcryp->Instance->CR;
  1590. uint32_t itflag = hcryp->Instance->SR;
  1591. /* Check if error occurred */
  1592. if ((itsource & CRYP_IT_ERRIE) != RESET)
  1593. {
  1594. /* If write Error occurred */
  1595. if ((itflag & CRYP_IT_WRERR) != RESET)
  1596. {
  1597. hcryp->ErrorCode |= HAL_CRYP_ERROR_WRITE;
  1598. }
  1599. /* If read Error occurred */
  1600. if ((itflag & CRYP_IT_RDERR) != RESET)
  1601. {
  1602. hcryp->ErrorCode |= HAL_CRYP_ERROR_READ;
  1603. }
  1604. }
  1605. if ((itflag & CRYP_IT_CCF) != RESET)
  1606. {
  1607. if ((itsource & CRYP_IT_CCFIE) != RESET)
  1608. {
  1609. /* Clear computation complete flag */
  1610. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1611. if ((hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC) || (hcryp->Init.Algorithm == CRYP_AES_CCM))
  1612. {
  1613. /* if header phase */
  1614. if ((hcryp->Instance->CR & CRYP_PHASE_HEADER) == CRYP_PHASE_HEADER)
  1615. {
  1616. CRYP_GCMCCM_SetHeaderPhase_IT(hcryp);
  1617. }
  1618. else /* if payload phase */
  1619. {
  1620. CRYP_GCMCCM_SetPayloadPhase_IT(hcryp);
  1621. }
  1622. }
  1623. else /* AES Algorithm ECB,CBC or CTR*/
  1624. {
  1625. CRYP_AES_IT(hcryp);
  1626. }
  1627. }
  1628. }
  1629. }
  1630. /**
  1631. * @brief Return the CRYP error code.
  1632. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1633. * the configuration information for the CRYP peripheral
  1634. * @retval CRYP error code
  1635. */
  1636. uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp)
  1637. {
  1638. return hcryp->ErrorCode;
  1639. }
  1640. /**
  1641. * @brief Returns the CRYP state.
  1642. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1643. * the configuration information for CRYP module.
  1644. * @retval HAL state
  1645. */
  1646. HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
  1647. {
  1648. return hcryp->State;
  1649. }
  1650. /**
  1651. * @brief Input FIFO transfer completed callback.
  1652. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1653. * the configuration information for CRYP module.
  1654. * @retval None
  1655. */
  1656. __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
  1657. {
  1658. /* Prevent unused argument(s) compilation warning */
  1659. UNUSED(hcryp);
  1660. /* NOTE : This function should not be modified; when the callback is needed,
  1661. the HAL_CRYP_InCpltCallback can be implemented in the user file
  1662. */
  1663. }
  1664. /**
  1665. * @brief Output FIFO transfer completed callback.
  1666. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1667. * the configuration information for CRYP module.
  1668. * @retval None
  1669. */
  1670. __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
  1671. {
  1672. /* Prevent unused argument(s) compilation warning */
  1673. UNUSED(hcryp);
  1674. /* NOTE : This function should not be modified; when the callback is needed,
  1675. the HAL_CRYP_OutCpltCallback can be implemented in the user file
  1676. */
  1677. }
  1678. /**
  1679. * @brief CRYP error callback.
  1680. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1681. * the configuration information for CRYP module.
  1682. * @retval None
  1683. */
  1684. __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
  1685. {
  1686. /* Prevent unused argument(s) compilation warning */
  1687. UNUSED(hcryp);
  1688. /* NOTE : This function should not be modified; when the callback is needed,
  1689. the HAL_CRYP_ErrorCallback can be implemented in the user file
  1690. */
  1691. }
  1692. /**
  1693. * @}
  1694. */
  1695. /**
  1696. * @}
  1697. */
  1698. /* Private functions ---------------------------------------------------------*/
  1699. /** @addtogroup CRYP_Private_Functions
  1700. * @{
  1701. */
  1702. /**
  1703. * @brief Encryption in ECB/CBC & CTR Algorithm with AES Standard
  1704. * @param hcryp pointer to a CRYP_HandleTypeDef structure
  1705. * @param Timeout specify Timeout value
  1706. * @retval HAL status
  1707. */
  1708. static HAL_StatusTypeDef CRYP_AES_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  1709. {
  1710. uint16_t incount; /* Temporary CrypInCount Value */
  1711. uint16_t outcount; /* Temporary CrypOutCount Value */
  1712. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  1713. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  1714. {
  1715. if (hcryp->KeyIVConfig == 1U)
  1716. {
  1717. /* If the Key and IV configuration has to be done only once
  1718. and if it has already been done, skip it */
  1719. DoKeyIVConfig = 0U;
  1720. }
  1721. else
  1722. {
  1723. /* If the Key and IV configuration has to be done only once
  1724. and if it has not been done already, do it and set KeyIVConfig
  1725. to keep track it won't have to be done again next time */
  1726. hcryp->KeyIVConfig = 1U;
  1727. }
  1728. }
  1729. if (DoKeyIVConfig == 1U)
  1730. {
  1731. /* Set the Key*/
  1732. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1733. if (hcryp->Init.Algorithm != CRYP_AES_ECB)
  1734. {
  1735. /* Set the Initialization Vector*/
  1736. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  1737. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  1738. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  1739. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  1740. }
  1741. } /* if (DoKeyIVConfig == 1U) */
  1742. /* Set the phase */
  1743. hcryp->Phase = CRYP_PHASE_PROCESS;
  1744. /* Enable CRYP */
  1745. __HAL_CRYP_ENABLE(hcryp);
  1746. incount = hcryp->CrypInCount;
  1747. outcount = hcryp->CrypOutCount;
  1748. while ((incount < (hcryp->Size / 4U)) && (outcount < (hcryp->Size / 4U)))
  1749. {
  1750. /* Write plain Ddta and get cipher data */
  1751. CRYP_AES_ProcessData(hcryp, Timeout);
  1752. incount = hcryp->CrypInCount;
  1753. outcount = hcryp->CrypOutCount;
  1754. }
  1755. /* Disable CRYP */
  1756. __HAL_CRYP_DISABLE(hcryp);
  1757. /* Change the CRYP state */
  1758. hcryp->State = HAL_CRYP_STATE_READY;
  1759. /* Return function status */
  1760. return HAL_OK;
  1761. }
  1762. /**
  1763. * @brief Encryption in ECB/CBC & CTR mode with AES Standard using interrupt mode
  1764. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1765. * the configuration information for CRYP module
  1766. * @retval HAL status
  1767. */
  1768. static HAL_StatusTypeDef CRYP_AES_Encrypt_IT(CRYP_HandleTypeDef *hcryp)
  1769. {
  1770. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  1771. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  1772. {
  1773. if (hcryp->KeyIVConfig == 1U)
  1774. {
  1775. /* If the Key and IV configuration has to be done only once
  1776. and if it has already been done, skip it */
  1777. DoKeyIVConfig = 0U;
  1778. }
  1779. else
  1780. {
  1781. /* If the Key and IV configuration has to be done only once
  1782. and if it has not been done already, do it and set KeyIVConfig
  1783. to keep track it won't have to be done again next time */
  1784. hcryp->KeyIVConfig = 1U;
  1785. }
  1786. }
  1787. if (DoKeyIVConfig == 1U)
  1788. {
  1789. /* Set the Key*/
  1790. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1791. if (hcryp->Init.Algorithm != CRYP_AES_ECB)
  1792. {
  1793. /* Set the Initialization Vector*/
  1794. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  1795. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  1796. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  1797. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  1798. }
  1799. } /* if (DoKeyIVConfig == 1U) */
  1800. /* Set the phase */
  1801. hcryp->Phase = CRYP_PHASE_PROCESS;
  1802. if (hcryp->Size != 0U)
  1803. {
  1804. /* Enable computation complete flag and error interrupts */
  1805. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  1806. /* Enable CRYP */
  1807. __HAL_CRYP_ENABLE(hcryp);
  1808. /* Increment the pointer before writing the input block in the IN FIFO to make sure that
  1809. when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value
  1810. and it is ready for the next operation. */
  1811. hcryp->CrypInCount++;
  1812. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  1813. hcryp->CrypInCount++;
  1814. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  1815. hcryp->CrypInCount++;
  1816. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  1817. hcryp->CrypInCount++;
  1818. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  1819. }
  1820. else
  1821. {
  1822. /* Change the CRYP state */
  1823. hcryp->State = HAL_CRYP_STATE_READY;
  1824. /* Process unlocked */
  1825. __HAL_UNLOCK(hcryp);
  1826. }
  1827. /* Return function status */
  1828. return HAL_OK;
  1829. }
  1830. /**
  1831. * @brief Decryption in ECB/CBC & CTR mode with AES Standard
  1832. * @param hcryp pointer to a CRYP_HandleTypeDef structure
  1833. * @param Timeout Specify Timeout value
  1834. * @retval HAL status
  1835. */
  1836. static HAL_StatusTypeDef CRYP_AES_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  1837. {
  1838. uint16_t incount; /* Temporary CrypInCount Value */
  1839. uint16_t outcount; /* Temporary CrypOutCount Value */
  1840. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  1841. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  1842. {
  1843. if (hcryp->KeyIVConfig == 1U)
  1844. {
  1845. /* If the Key and IV configuration has to be done only once
  1846. and if it has already been done, skip it */
  1847. DoKeyIVConfig = 0U;
  1848. }
  1849. else
  1850. {
  1851. /* If the Key and IV configuration has to be done only once
  1852. and if it has not been done already, do it and set KeyIVConfig
  1853. to keep track it won't have to be done again next time */
  1854. hcryp->KeyIVConfig = 1U;
  1855. }
  1856. }
  1857. if (DoKeyIVConfig == 1U)
  1858. {
  1859. /* Key preparation for ECB/CBC */
  1860. if (hcryp->Init.Algorithm != CRYP_AES_CTR) /*ECB or CBC*/
  1861. {
  1862. if (hcryp->AutoKeyDerivation == DISABLE)/*Mode 2 Key preparation*/
  1863. {
  1864. /* Set key preparation for decryption operating mode*/
  1865. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_KEYDERIVATION);
  1866. /* Set the Key*/
  1867. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1868. /* Enable CRYP */
  1869. __HAL_CRYP_ENABLE(hcryp);
  1870. /* Wait for CCF flag to be raised */
  1871. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  1872. {
  1873. /* Disable the CRYP peripheral clock */
  1874. __HAL_CRYP_DISABLE(hcryp);
  1875. /* Change state & error code*/
  1876. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  1877. hcryp->State = HAL_CRYP_STATE_READY;
  1878. /* Process unlocked */
  1879. __HAL_UNLOCK(hcryp);
  1880. return HAL_ERROR;
  1881. }
  1882. /* Clear CCF Flag */
  1883. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1884. /* Return to decryption operating mode(Mode 3)*/
  1885. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_DECRYPT);
  1886. }
  1887. else /*Mode 4 : decryption & Key preparation*/
  1888. {
  1889. /* Set the Key*/
  1890. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1891. /* Set decryption & Key preparation operating mode*/
  1892. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT);
  1893. }
  1894. }
  1895. else /*Algorithm CTR */
  1896. {
  1897. /* Set the Key*/
  1898. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1899. }
  1900. /* Set IV */
  1901. if (hcryp->Init.Algorithm != CRYP_AES_ECB)
  1902. {
  1903. /* Set the Initialization Vector*/
  1904. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  1905. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  1906. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  1907. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  1908. }
  1909. } /* if (DoKeyIVConfig == 1U) */
  1910. /* Set the phase */
  1911. hcryp->Phase = CRYP_PHASE_PROCESS;
  1912. /* Enable CRYP */
  1913. __HAL_CRYP_ENABLE(hcryp);
  1914. incount = hcryp->CrypInCount;
  1915. outcount = hcryp->CrypOutCount;
  1916. while ((incount < (hcryp->Size / 4U)) && (outcount < (hcryp->Size / 4U)))
  1917. {
  1918. /* Write plain data and get cipher data */
  1919. CRYP_AES_ProcessData(hcryp, Timeout);
  1920. incount = hcryp->CrypInCount;
  1921. outcount = hcryp->CrypOutCount;
  1922. }
  1923. /* Disable CRYP */
  1924. __HAL_CRYP_DISABLE(hcryp);
  1925. /* Change the CRYP state */
  1926. hcryp->State = HAL_CRYP_STATE_READY;
  1927. /* Return function status */
  1928. return HAL_OK;
  1929. }
  1930. /**
  1931. * @brief Decryption in ECB/CBC & CTR mode with AES Standard using interrupt mode
  1932. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  1933. * the configuration information for CRYP module
  1934. * @retval HAL status
  1935. */
  1936. static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp)
  1937. {
  1938. __IO uint32_t count = 0U;
  1939. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  1940. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  1941. {
  1942. if (hcryp->KeyIVConfig == 1U)
  1943. {
  1944. /* If the Key and IV configuration has to be done only once
  1945. and if it has already been done, skip it */
  1946. DoKeyIVConfig = 0U;
  1947. }
  1948. else
  1949. {
  1950. /* If the Key and IV configuration has to be done only once
  1951. and if it has not been done already, do it and set KeyIVConfig
  1952. to keep track it won't have to be done again next time */
  1953. hcryp->KeyIVConfig = 1U;
  1954. }
  1955. }
  1956. if (DoKeyIVConfig == 1U)
  1957. {
  1958. /* Key preparation for ECB/CBC */
  1959. if (hcryp->Init.Algorithm != CRYP_AES_CTR)
  1960. {
  1961. if (hcryp->AutoKeyDerivation == DISABLE)/*Mode 2 Key preparation*/
  1962. {
  1963. /* Set key preparation for decryption operating mode*/
  1964. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_KEYDERIVATION);
  1965. /* Set the Key*/
  1966. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1967. /* Enable CRYP */
  1968. __HAL_CRYP_ENABLE(hcryp);
  1969. /* Wait for CCF flag to be raised */
  1970. count = CRYP_TIMEOUT_KEYPREPARATION;
  1971. do
  1972. {
  1973. count-- ;
  1974. if (count == 0U)
  1975. {
  1976. /* Disable the CRYP peripheral clock */
  1977. __HAL_CRYP_DISABLE(hcryp);
  1978. /* Change state */
  1979. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  1980. hcryp->State = HAL_CRYP_STATE_READY;
  1981. /* Process unlocked */
  1982. __HAL_UNLOCK(hcryp);
  1983. return HAL_ERROR;
  1984. }
  1985. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  1986. /* Clear CCF Flag */
  1987. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1988. /* Return to decryption operating mode(Mode 3)*/
  1989. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_DECRYPT);
  1990. }
  1991. else /*Mode 4 : decryption & key preparation*/
  1992. {
  1993. /* Set the Key*/
  1994. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  1995. /* Set decryption & key preparation operating mode*/
  1996. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT);
  1997. }
  1998. }
  1999. else /*Algorithm CTR */
  2000. {
  2001. /* Set the Key*/
  2002. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  2003. }
  2004. /* Set IV */
  2005. if (hcryp->Init.Algorithm != CRYP_AES_ECB)
  2006. {
  2007. /* Set the Initialization Vector*/
  2008. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  2009. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  2010. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  2011. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  2012. }
  2013. } /* if (DoKeyIVConfig == 1U) */
  2014. /* Set the phase */
  2015. hcryp->Phase = CRYP_PHASE_PROCESS;
  2016. if (hcryp->Size != 0U)
  2017. {
  2018. /* Enable computation complete flag and error interrupts */
  2019. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  2020. /* Enable CRYP */
  2021. __HAL_CRYP_ENABLE(hcryp);
  2022. /* Increment the pointer before writing the input block in the IN FIFO to make sure that
  2023. when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value
  2024. and it is ready for the next operation. */
  2025. hcryp->CrypInCount++;
  2026. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  2027. hcryp->CrypInCount++;
  2028. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  2029. hcryp->CrypInCount++;
  2030. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  2031. hcryp->CrypInCount++;
  2032. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  2033. }
  2034. else
  2035. {
  2036. /* Process locked */
  2037. __HAL_UNLOCK(hcryp);
  2038. /* Change the CRYP state */
  2039. hcryp->State = HAL_CRYP_STATE_READY;
  2040. }
  2041. /* Return function status */
  2042. return HAL_OK;
  2043. }
  2044. /**
  2045. * @brief Decryption in ECB/CBC & CTR mode with AES Standard using DMA mode
  2046. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2047. * the configuration information for CRYP module
  2048. * @retval HAL status
  2049. */
  2050. static HAL_StatusTypeDef CRYP_AES_Decrypt_DMA(CRYP_HandleTypeDef *hcryp)
  2051. {
  2052. __IO uint32_t count = 0U;
  2053. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  2054. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  2055. {
  2056. if (hcryp->KeyIVConfig == 1U)
  2057. {
  2058. /* If the Key and IV configuration has to be done only once
  2059. and if it has already been done, skip it */
  2060. DoKeyIVConfig = 0U;
  2061. }
  2062. else
  2063. {
  2064. /* If the Key and IV configuration has to be done only once
  2065. and if it has not been done already, do it and set KeyIVConfig
  2066. to keep track it won't have to be done again next time */
  2067. hcryp->KeyIVConfig = 1U;
  2068. }
  2069. }
  2070. if (DoKeyIVConfig == 1U)
  2071. {
  2072. /* Key preparation for ECB/CBC */
  2073. if (hcryp->Init.Algorithm != CRYP_AES_CTR)
  2074. {
  2075. if (hcryp->AutoKeyDerivation == DISABLE)/*Mode 2 key preparation*/
  2076. {
  2077. /* Set key preparation for decryption operating mode*/
  2078. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_KEYDERIVATION);
  2079. /* Set the Key*/
  2080. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  2081. /* Enable CRYP */
  2082. __HAL_CRYP_ENABLE(hcryp);
  2083. /* Wait for CCF flag to be raised */
  2084. count = CRYP_TIMEOUT_KEYPREPARATION;
  2085. do
  2086. {
  2087. count-- ;
  2088. if (count == 0U)
  2089. {
  2090. /* Disable the CRYP peripheral clock */
  2091. __HAL_CRYP_DISABLE(hcryp);
  2092. /* Change state */
  2093. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  2094. hcryp->State = HAL_CRYP_STATE_READY;
  2095. /* Process unlocked */
  2096. __HAL_UNLOCK(hcryp);
  2097. return HAL_ERROR;
  2098. }
  2099. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  2100. /* Clear CCF Flag */
  2101. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2102. /* Return to decryption operating mode(Mode 3)*/
  2103. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_DECRYPT);
  2104. }
  2105. else /*Mode 4 : decryption & key preparation*/
  2106. {
  2107. /* Set the Key*/
  2108. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  2109. /* Set decryption & Key preparation operating mode*/
  2110. MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT);
  2111. }
  2112. }
  2113. else /*Algorithm CTR */
  2114. {
  2115. /* Set the Key*/
  2116. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  2117. }
  2118. if (hcryp->Init.Algorithm != CRYP_AES_ECB)
  2119. {
  2120. /* Set the Initialization Vector*/
  2121. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  2122. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  2123. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  2124. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  2125. }
  2126. } /* if (DoKeyIVConfig == 1U) */
  2127. /* Set the phase */
  2128. hcryp->Phase = CRYP_PHASE_PROCESS;
  2129. if (hcryp->Size != 0U)
  2130. {
  2131. /* Set the input and output addresses and start DMA transfer */
  2132. CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr));
  2133. }
  2134. else
  2135. {
  2136. /* Process unlocked */
  2137. __HAL_UNLOCK(hcryp);
  2138. /* Change the CRYP state */
  2139. hcryp->State = HAL_CRYP_STATE_READY;
  2140. }
  2141. /* Return function status */
  2142. return HAL_OK;
  2143. }
  2144. /**
  2145. * @brief DMA CRYP input data process complete callback.
  2146. * @param hdma DMA handle
  2147. * @retval None
  2148. */
  2149. static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
  2150. {
  2151. CRYP_HandleTypeDef *hcryp = (CRYP_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2152. uint32_t loopcounter;
  2153. uint32_t headersize_in_bytes;
  2154. uint32_t tmp;
  2155. static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
  2156. 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
  2157. 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
  2158. }; /* 8-bit data type */
  2159. /* Stop the DMA transfers to the IN FIFO by clearing to "0" the DMAINEN */
  2160. CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
  2161. if (hcryp->Phase == CRYP_PHASE_HEADER_DMA_FEED)
  2162. {
  2163. /* DMA is disabled, CCF is meaningful. Wait for computation completion before moving forward */
  2164. CRYP_ClearCCFlagWhenHigh(hcryp, CRYP_TIMEOUT_GCMCCMHEADERPHASE);
  2165. /* Set the phase */
  2166. hcryp->Phase = CRYP_PHASE_PROCESS;
  2167. if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
  2168. {
  2169. headersize_in_bytes = hcryp->Init.HeaderSize * 4U;
  2170. }
  2171. else
  2172. {
  2173. headersize_in_bytes = hcryp->Init.HeaderSize;
  2174. }
  2175. if ((headersize_in_bytes % 16U) != 0U)
  2176. {
  2177. /* Write last words that couldn't be fed by DMA */
  2178. hcryp->CrypHeaderCount = (uint16_t)((headersize_in_bytes / 16U) * 4U);
  2179. for (loopcounter = 0U; (loopcounter < ((headersize_in_bytes / 4U) % 4U)); loopcounter++)
  2180. {
  2181. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  2182. hcryp->CrypHeaderCount++ ;
  2183. }
  2184. /* If the header size is a multiple of words */
  2185. if ((headersize_in_bytes % 4U) == 0U)
  2186. {
  2187. /* Pad the data with zeros to have a complete block */
  2188. while (loopcounter < 4U)
  2189. {
  2190. hcryp->Instance->DINR = 0x0U;
  2191. loopcounter++;
  2192. }
  2193. }
  2194. else
  2195. {
  2196. /* Enter last bytes, padded with zeros */
  2197. tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  2198. tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)];
  2199. hcryp->Instance->DINR = tmp;
  2200. loopcounter++;
  2201. /* Pad the data with zeros to have a complete block */
  2202. while (loopcounter < 4U)
  2203. {
  2204. hcryp->Instance->DINR = 0x0U;
  2205. loopcounter++;
  2206. }
  2207. }
  2208. /* Wait for computation completion before moving forward */
  2209. CRYP_ClearCCFlagWhenHigh(hcryp, CRYP_TIMEOUT_GCMCCMHEADERPHASE);
  2210. } /* if ((headersize_in_bytes % 16U) != 0U) */
  2211. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  2212. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  2213. /* Select payload phase once the header phase is performed */
  2214. CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
  2215. /* Initiate payload DMA IN and processed data DMA OUT transfers */
  2216. (void)CRYP_GCMCCM_SetPayloadPhase_DMA(hcryp);
  2217. }
  2218. else
  2219. {
  2220. uint32_t algo;
  2221. /* ECB, CBC or CTR end of input data feeding
  2222. or
  2223. end of GCM/CCM payload data feeding through DMA */
  2224. algo = hcryp->Instance->CR & AES_CR_CHMOD;
  2225. /* Don't call input data transfer complete callback only if
  2226. it remains some input data to write to the peripheral.
  2227. This case can only occur for GCM and CCM with a payload length
  2228. not a multiple of 16 bytes */
  2229. if (!(((algo == CRYP_AES_GCM_GMAC) || (algo == CRYP_AES_CCM)) && \
  2230. (((hcryp->Size) % 16U) != 0U)))
  2231. {
  2232. /* Call input data transfer complete callback */
  2233. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2234. /*Call registered Input complete callback*/
  2235. hcryp->InCpltCallback(hcryp);
  2236. #else
  2237. /*Call legacy weak Input complete callback*/
  2238. HAL_CRYP_InCpltCallback(hcryp);
  2239. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2240. }
  2241. } /* if (hcryp->Phase == CRYP_PHASE_HEADER_DMA_FEED) */
  2242. }
  2243. /**
  2244. * @brief DMA CRYP output data process complete callback.
  2245. * @param hdma DMA handle
  2246. * @retval None
  2247. */
  2248. static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
  2249. {
  2250. uint32_t count;
  2251. uint32_t npblb;
  2252. uint32_t lastwordsize;
  2253. uint32_t temp[4]; /* Temporary CrypOutBuff */
  2254. uint32_t mode;
  2255. CRYP_HandleTypeDef *hcryp = (CRYP_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2256. /* Stop the DMA transfers to the OUT FIFO by clearing to "0" the DMAOUTEN */
  2257. CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
  2258. /* Clear CCF flag */
  2259. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2260. /* Last block transfer in case of GCM or CCM with Size not %16*/
  2261. if (((hcryp->Size) % 16U) != 0U)
  2262. {
  2263. /* set CrypInCount and CrypOutCount to exact number of word already computed via DMA */
  2264. hcryp->CrypInCount = (hcryp->Size / 16U) * 4U;
  2265. hcryp->CrypOutCount = hcryp->CrypInCount;
  2266. /* Compute the number of padding bytes in last block of payload */
  2267. npblb = ((((uint32_t)hcryp->Size / 16U) + 1U) * 16U) - ((uint32_t)hcryp->Size);
  2268. mode = hcryp->Instance->CR & AES_CR_MODE;
  2269. if (((mode == CRYP_OPERATINGMODE_ENCRYPT) && (hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC)) ||
  2270. ((mode == CRYP_OPERATINGMODE_DECRYPT) && (hcryp->Init.Algorithm == CRYP_AES_CCM)))
  2271. {
  2272. /* Specify the number of non-valid bytes using NPBLB register*/
  2273. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  2274. }
  2275. /* Number of valid words (lastwordsize) in last block */
  2276. if ((npblb % 4U) == 0U)
  2277. {
  2278. lastwordsize = (16U - npblb) / 4U;
  2279. }
  2280. else
  2281. {
  2282. lastwordsize = ((16U - npblb) / 4U) + 1U;
  2283. }
  2284. /* Last block optionally pad the data with zeros*/
  2285. for (count = 0U; count < lastwordsize; count++)
  2286. {
  2287. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2288. hcryp->CrypInCount++;
  2289. }
  2290. while (count < 4U)
  2291. {
  2292. /* Pad the data with zeros to have a complete block */
  2293. hcryp->Instance->DINR = 0x0U;
  2294. count++;
  2295. }
  2296. /* Call input data transfer complete callback */
  2297. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2298. /*Call registered Input complete callback*/
  2299. hcryp->InCpltCallback(hcryp);
  2300. #else
  2301. /*Call legacy weak Input complete callback*/
  2302. HAL_CRYP_InCpltCallback(hcryp);
  2303. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2304. /*Wait on CCF flag*/
  2305. CRYP_ClearCCFlagWhenHigh(hcryp, CRYP_TIMEOUT_GCMCCMHEADERPHASE);
  2306. /*Read the output block from the output FIFO */
  2307. for (count = 0U; count < 4U; count++)
  2308. {
  2309. /* Read the output block from the output FIFO and put them in temporary buffer
  2310. then get CrypOutBuff from temporary buffer */
  2311. temp[count] = hcryp->Instance->DOUTR;
  2312. }
  2313. count = 0U;
  2314. while ((hcryp->CrypOutCount < ((hcryp->Size + 3U) / 4U)) && (count < 4U))
  2315. {
  2316. *(uint32_t *)(hcryp->pCrypOutBuffPtr + hcryp->CrypOutCount) = temp[count];
  2317. hcryp->CrypOutCount++;
  2318. count++;
  2319. }
  2320. }
  2321. if (((hcryp->Init.Algorithm & CRYP_AES_GCM_GMAC) != CRYP_AES_GCM_GMAC)
  2322. && ((hcryp->Init.Algorithm & CRYP_AES_CCM) != CRYP_AES_CCM))
  2323. {
  2324. /* Disable CRYP (not allowed in GCM)*/
  2325. __HAL_CRYP_DISABLE(hcryp);
  2326. }
  2327. /* Change the CRYP state to ready */
  2328. hcryp->State = HAL_CRYP_STATE_READY;
  2329. /* Process unlocked */
  2330. __HAL_UNLOCK(hcryp);
  2331. /* Call output data transfer complete callback */
  2332. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2333. /*Call registered Output complete callback*/
  2334. hcryp->OutCpltCallback(hcryp);
  2335. #else
  2336. /*Call legacy weak Output complete callback*/
  2337. HAL_CRYP_OutCpltCallback(hcryp);
  2338. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2339. }
  2340. /**
  2341. * @brief DMA CRYP communication error callback.
  2342. * @param hdma DMA handle
  2343. * @retval None
  2344. */
  2345. static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
  2346. {
  2347. CRYP_HandleTypeDef *hcryp = (CRYP_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2348. /* Change the CRYP peripheral state */
  2349. hcryp->State = HAL_CRYP_STATE_READY;
  2350. /* DMA error code field */
  2351. hcryp->ErrorCode |= HAL_CRYP_ERROR_DMA;
  2352. /* Clear CCF flag */
  2353. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2354. /* Call error callback */
  2355. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2356. /*Call registered error callback*/
  2357. hcryp->ErrorCallback(hcryp);
  2358. #else
  2359. /*Call legacy weak error callback*/
  2360. HAL_CRYP_ErrorCallback(hcryp);
  2361. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2362. }
  2363. /**
  2364. * @brief Set the DMA configuration and start the DMA transfer
  2365. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2366. * the configuration information for CRYP module
  2367. * @param inputaddr address of the input buffer
  2368. * @param Size size of the input and output buffers in words, must be a multiple of 4
  2369. * @param outputaddr address of the output buffer
  2370. * @retval None
  2371. */
  2372. static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
  2373. {
  2374. /* Set the CRYP DMA transfer complete callback */
  2375. hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
  2376. /* Set the DMA input error callback */
  2377. hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
  2378. /* Set the CRYP DMA transfer complete callback */
  2379. hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
  2380. /* Set the DMA output error callback */
  2381. hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
  2382. if ((hcryp->Init.Algorithm & CRYP_AES_GCM_GMAC) != CRYP_AES_GCM_GMAC)
  2383. {
  2384. /* Enable CRYP (not allowed in GCM & CCM)*/
  2385. __HAL_CRYP_ENABLE(hcryp);
  2386. }
  2387. /* Enable the DMA input stream */
  2388. if (HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size) != HAL_OK)
  2389. {
  2390. /* DMA error code field */
  2391. hcryp->ErrorCode |= HAL_CRYP_ERROR_DMA;
  2392. /* Call error callback */
  2393. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2394. /*Call registered error callback*/
  2395. hcryp->ErrorCallback(hcryp);
  2396. #else
  2397. /*Call legacy weak error callback*/
  2398. HAL_CRYP_ErrorCallback(hcryp);
  2399. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2400. }
  2401. /* Enable the DMA output stream */
  2402. if (HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size) != HAL_OK)
  2403. {
  2404. /* DMA error code field */
  2405. hcryp->ErrorCode |= HAL_CRYP_ERROR_DMA;
  2406. /* Call error callback */
  2407. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2408. /*Call registered error callback*/
  2409. hcryp->ErrorCallback(hcryp);
  2410. #else
  2411. /*Call legacy weak error callback*/
  2412. HAL_CRYP_ErrorCallback(hcryp);
  2413. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2414. }
  2415. /* Enable In and Out DMA requests */
  2416. SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN));
  2417. }
  2418. /**
  2419. * @brief Set the DMA configuration and start the header DMA transfer
  2420. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2421. * the configuration information for CRYP module
  2422. * @param inputaddr address of the input buffer
  2423. * @param Size size of the input buffer in words, must be a multiple of 4
  2424. * @retval None
  2425. */
  2426. static HAL_StatusTypeDef CRYP_SetHeaderDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size)
  2427. {
  2428. /* Set the CRYP DMA transfer complete callback */
  2429. hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
  2430. /* Set the DMA input error callback */
  2431. hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
  2432. /* Mark that header is fed to the peripheral in DMA mode */
  2433. hcryp->Phase = CRYP_PHASE_HEADER_DMA_FEED;
  2434. /* Enable the DMA input stream */
  2435. if (HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size) != HAL_OK)
  2436. {
  2437. /* DMA error code field */
  2438. hcryp->ErrorCode |= HAL_CRYP_ERROR_DMA;
  2439. hcryp->State = HAL_CRYP_STATE_READY;
  2440. /* Process unlocked */
  2441. __HAL_UNLOCK(hcryp);
  2442. return HAL_ERROR;
  2443. /* Call error callback */
  2444. }
  2445. /* Enable IN DMA requests */
  2446. SET_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
  2447. return HAL_OK;
  2448. }
  2449. /**
  2450. * @brief Process Data: Write Input data in polling mode and used in AES functions.
  2451. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2452. * the configuration information for CRYP module
  2453. * @param Timeout Specify Timeout value
  2454. * @retval None
  2455. */
  2456. static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  2457. {
  2458. uint32_t temp[4]; /* Temporary CrypOutBuff */
  2459. uint32_t i;
  2460. /* Write the input block in the IN FIFO */
  2461. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2462. hcryp->CrypInCount++;
  2463. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2464. hcryp->CrypInCount++;
  2465. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2466. hcryp->CrypInCount++;
  2467. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2468. hcryp->CrypInCount++;
  2469. /* Wait for CCF flag to be raised */
  2470. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  2471. {
  2472. /* Disable the CRYP peripheral clock */
  2473. __HAL_CRYP_DISABLE(hcryp);
  2474. /* Change state */
  2475. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  2476. hcryp->State = HAL_CRYP_STATE_READY;
  2477. /* Process unlocked */
  2478. __HAL_UNLOCK(hcryp);
  2479. /*Call registered error callback*/
  2480. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2481. hcryp->ErrorCallback(hcryp);
  2482. #else
  2483. /*Call legacy weak error callback*/
  2484. HAL_CRYP_ErrorCallback(hcryp);
  2485. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2486. }
  2487. /* Clear CCF Flag */
  2488. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2489. /* Read the output block from the output FIFO and put them in temporary buffer
  2490. then get CrypOutBuff from temporary buffer*/
  2491. for (i = 0U; i < 4U; i++)
  2492. {
  2493. temp[i] = hcryp->Instance->DOUTR;
  2494. }
  2495. i = 0U;
  2496. while ((hcryp->CrypOutCount < ((hcryp->Size + 3U) / 4U)) && (i < 4U))
  2497. {
  2498. *(uint32_t *)(hcryp->pCrypOutBuffPtr + hcryp->CrypOutCount) = temp[i];
  2499. hcryp->CrypOutCount++;
  2500. i++;
  2501. }
  2502. }
  2503. /**
  2504. * @brief Handle CRYP block input/output data handling under interruption.
  2505. * @note The function is called under interruption only, once
  2506. * interruptions have been enabled by HAL_CRYP_Encrypt_IT or HAL_CRYP_Decrypt_IT.
  2507. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2508. * the configuration information for CRYP module.
  2509. * @retval HAL status
  2510. */
  2511. static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp)
  2512. {
  2513. uint32_t temp[4]; /* Temporary CrypOutBuff */
  2514. uint32_t i;
  2515. if (hcryp->State == HAL_CRYP_STATE_BUSY)
  2516. {
  2517. /* Read the output block from the output FIFO and put them in temporary buffer
  2518. then get CrypOutBuff from temporary buffer*/
  2519. for (i = 0U; i < 4U; i++)
  2520. {
  2521. temp[i] = hcryp->Instance->DOUTR;
  2522. }
  2523. i = 0U;
  2524. while ((hcryp->CrypOutCount < ((hcryp->Size + 3U) / 4U)) && (i < 4U))
  2525. {
  2526. *(uint32_t *)(hcryp->pCrypOutBuffPtr + hcryp->CrypOutCount) = temp[i];
  2527. hcryp->CrypOutCount++;
  2528. i++;
  2529. }
  2530. if (hcryp->CrypOutCount == (hcryp->Size / 4U))
  2531. {
  2532. /* Disable Computation Complete flag and errors interrupts */
  2533. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  2534. /* Change the CRYP state */
  2535. hcryp->State = HAL_CRYP_STATE_READY;
  2536. /* Disable CRYP */
  2537. __HAL_CRYP_DISABLE(hcryp);
  2538. /* Process Unlocked */
  2539. __HAL_UNLOCK(hcryp);
  2540. /* Call Output transfer complete callback */
  2541. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2542. /*Call registered Output complete callback*/
  2543. hcryp->OutCpltCallback(hcryp);
  2544. #else
  2545. /*Call legacy weak Output complete callback*/
  2546. HAL_CRYP_OutCpltCallback(hcryp);
  2547. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2548. }
  2549. else
  2550. {
  2551. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  2552. /* If suspension flag has been raised, suspend processing
  2553. only if not already at the end of the payload */
  2554. if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
  2555. {
  2556. /* Clear CCF Flag */
  2557. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2558. /* reset SuspendRequest */
  2559. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  2560. /* Disable Computation Complete Flag and Errors Interrupts */
  2561. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  2562. /* Change the CRYP state */
  2563. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  2564. /* Mark that the payload phase is suspended */
  2565. hcryp->Phase = CRYP_PHASE_PAYLOAD_SUSPENDED;
  2566. /* Process Unlocked */
  2567. __HAL_UNLOCK(hcryp);
  2568. }
  2569. else
  2570. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  2571. {
  2572. /* Write the input block in the IN FIFO */
  2573. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2574. hcryp->CrypInCount++;
  2575. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2576. hcryp->CrypInCount++;
  2577. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2578. hcryp->CrypInCount++;
  2579. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2580. hcryp->CrypInCount++;
  2581. if (hcryp->CrypInCount == (hcryp->Size / 4U))
  2582. {
  2583. /* Call Input transfer complete callback */
  2584. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2585. /*Call registered Input complete callback*/
  2586. hcryp->InCpltCallback(hcryp);
  2587. #else
  2588. /*Call legacy weak Input complete callback*/
  2589. HAL_CRYP_InCpltCallback(hcryp);
  2590. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2591. }
  2592. }
  2593. }
  2594. }
  2595. else
  2596. {
  2597. /* Busy error code field */
  2598. hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
  2599. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2600. /*Call registered error callback*/
  2601. hcryp->ErrorCallback(hcryp);
  2602. #else
  2603. /*Call legacy weak error callback*/
  2604. HAL_CRYP_ErrorCallback(hcryp);
  2605. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2606. }
  2607. }
  2608. /**
  2609. * @brief Writes Key in Key registers.
  2610. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2611. * the configuration information for CRYP module
  2612. * @param KeySize Size of Key
  2613. * @note If pKey is NULL, the Key registers are not written. This configuration
  2614. * occurs when the key is written out of HAL scope.
  2615. * @retval None
  2616. */
  2617. static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint32_t KeySize)
  2618. {
  2619. if (hcryp->Init.pKey != NULL)
  2620. {
  2621. switch (KeySize)
  2622. {
  2623. case CRYP_KEYSIZE_256B:
  2624. hcryp->Instance->KEYR7 = *(uint32_t *)(hcryp->Init.pKey);
  2625. hcryp->Instance->KEYR6 = *(uint32_t *)(hcryp->Init.pKey + 1U);
  2626. hcryp->Instance->KEYR5 = *(uint32_t *)(hcryp->Init.pKey + 2U);
  2627. hcryp->Instance->KEYR4 = *(uint32_t *)(hcryp->Init.pKey + 3U);
  2628. hcryp->Instance->KEYR3 = *(uint32_t *)(hcryp->Init.pKey + 4U);
  2629. hcryp->Instance->KEYR2 = *(uint32_t *)(hcryp->Init.pKey + 5U);
  2630. hcryp->Instance->KEYR1 = *(uint32_t *)(hcryp->Init.pKey + 6U);
  2631. hcryp->Instance->KEYR0 = *(uint32_t *)(hcryp->Init.pKey + 7U);
  2632. break;
  2633. case CRYP_KEYSIZE_128B:
  2634. hcryp->Instance->KEYR3 = *(uint32_t *)(hcryp->Init.pKey);
  2635. hcryp->Instance->KEYR2 = *(uint32_t *)(hcryp->Init.pKey + 1U);
  2636. hcryp->Instance->KEYR1 = *(uint32_t *)(hcryp->Init.pKey + 2U);
  2637. hcryp->Instance->KEYR0 = *(uint32_t *)(hcryp->Init.pKey + 3U);
  2638. break;
  2639. default:
  2640. break;
  2641. }
  2642. }
  2643. }
  2644. /**
  2645. * @brief Encryption/Decryption process in AES GCM mode and prepare the authentication TAG
  2646. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2647. * the configuration information for CRYP module
  2648. * @param Timeout Timeout duration
  2649. * @retval HAL status
  2650. */
  2651. static HAL_StatusTypeDef CRYP_AESGCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  2652. {
  2653. uint32_t tickstart;
  2654. uint32_t wordsize = ((uint32_t)hcryp->Size / 4U) ;
  2655. uint32_t npblb;
  2656. uint32_t temp[4]; /* Temporary CrypOutBuff */
  2657. uint32_t index;
  2658. uint32_t lastwordsize;
  2659. uint32_t incount; /* Temporary CrypInCount Value */
  2660. uint32_t outcount; /* Temporary CrypOutCount Value */
  2661. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  2662. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  2663. {
  2664. if (hcryp->KeyIVConfig == 1U)
  2665. {
  2666. /* If the Key and IV configuration has to be done only once
  2667. and if it has already been done, skip it */
  2668. DoKeyIVConfig = 0U;
  2669. hcryp->SizesSum += hcryp->Size; /* Compute message total payload length */
  2670. }
  2671. else
  2672. {
  2673. /* If the Key and IV configuration has to be done only once
  2674. and if it has not been done already, do it and set KeyIVConfig
  2675. to keep track it won't have to be done again next time */
  2676. hcryp->KeyIVConfig = 1U;
  2677. hcryp->SizesSum = hcryp->Size; /* Merely store payload length */
  2678. }
  2679. }
  2680. else
  2681. {
  2682. hcryp->SizesSum = hcryp->Size;
  2683. }
  2684. if (DoKeyIVConfig == 1U)
  2685. {
  2686. /* Reset CrypHeaderCount */
  2687. hcryp->CrypHeaderCount = 0U;
  2688. /****************************** Init phase **********************************/
  2689. CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
  2690. /* Set the key */
  2691. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  2692. /* Set the initialization vector and the counter : Initial Counter Block (ICB)*/
  2693. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  2694. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  2695. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  2696. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  2697. /* Enable the CRYP peripheral */
  2698. __HAL_CRYP_ENABLE(hcryp);
  2699. /* just wait for hash computation */
  2700. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  2701. {
  2702. /* Change state */
  2703. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  2704. hcryp->State = HAL_CRYP_STATE_READY;
  2705. /* Process unlocked & return error */
  2706. __HAL_UNLOCK(hcryp);
  2707. return HAL_ERROR;
  2708. }
  2709. /* Clear CCF flag */
  2710. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2711. /************************ Header phase *************************************/
  2712. if (CRYP_GCMCCM_SetHeaderPhase(hcryp, Timeout) != HAL_OK)
  2713. {
  2714. return HAL_ERROR;
  2715. }
  2716. /*************************Payload phase ************************************/
  2717. /* Set the phase */
  2718. hcryp->Phase = CRYP_PHASE_PROCESS;
  2719. /* Select payload phase once the header phase is performed */
  2720. CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
  2721. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  2722. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  2723. } /* if (DoKeyIVConfig == 1U) */
  2724. if ((hcryp->Size % 16U) != 0U)
  2725. {
  2726. /* recalculate wordsize */
  2727. wordsize = ((wordsize / 4U) * 4U) ;
  2728. }
  2729. /* Get tick */
  2730. tickstart = HAL_GetTick();
  2731. /* Write input data and get output Data */
  2732. incount = hcryp->CrypInCount;
  2733. outcount = hcryp->CrypOutCount;
  2734. while ((incount < wordsize) && (outcount < wordsize))
  2735. {
  2736. /* Write plain data and get cipher data */
  2737. CRYP_AES_ProcessData(hcryp, Timeout);
  2738. /* Check for the Timeout */
  2739. if (Timeout != HAL_MAX_DELAY)
  2740. {
  2741. if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  2742. {
  2743. /* Disable the CRYP peripheral clock */
  2744. __HAL_CRYP_DISABLE(hcryp);
  2745. /* Change state & error code */
  2746. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  2747. hcryp->State = HAL_CRYP_STATE_READY;
  2748. /* Process unlocked */
  2749. __HAL_UNLOCK(hcryp);
  2750. return HAL_ERROR;
  2751. }
  2752. }
  2753. incount = hcryp->CrypInCount;
  2754. outcount = hcryp->CrypOutCount;
  2755. }
  2756. if ((hcryp->Size % 16U) != 0U)
  2757. {
  2758. /* Compute the number of padding bytes in last block of payload */
  2759. npblb = ((((uint32_t)hcryp->Size / 16U) + 1U) * 16U) - ((uint32_t)hcryp->Size);
  2760. /* Set Npblb in case of AES GCM payload encryption to get right tag*/
  2761. if ((hcryp->Instance->CR & AES_CR_MODE) == CRYP_OPERATINGMODE_ENCRYPT)
  2762. {
  2763. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  2764. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  2765. }
  2766. /* Number of valid words (lastwordsize) in last block */
  2767. if ((npblb % 4U) == 0U)
  2768. {
  2769. lastwordsize = (16U - npblb) / 4U;
  2770. }
  2771. else
  2772. {
  2773. lastwordsize = ((16U - npblb) / 4U) + 1U;
  2774. }
  2775. /* last block optionally pad the data with zeros*/
  2776. for (index = 0U; index < lastwordsize; index ++)
  2777. {
  2778. /* Write the last Input block in the IN FIFO */
  2779. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2780. hcryp->CrypInCount++;
  2781. }
  2782. while (index < 4U)
  2783. {
  2784. /* pad the data with zeros to have a complete block */
  2785. hcryp->Instance->DINR = 0U;
  2786. index++;
  2787. }
  2788. /* Wait for CCF flag to be raised */
  2789. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  2790. {
  2791. hcryp->State = HAL_CRYP_STATE_READY;
  2792. __HAL_UNLOCK(hcryp);
  2793. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2794. /*Call registered error callback*/
  2795. hcryp->ErrorCallback(hcryp);
  2796. #else
  2797. /*Call legacy weak error callback*/
  2798. HAL_CRYP_ErrorCallback(hcryp);
  2799. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2800. }
  2801. /* Clear CCF Flag */
  2802. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2803. /*Read the output block from the output FIFO */
  2804. for (index = 0U; index < 4U; index++)
  2805. {
  2806. /* Read the output block from the output FIFO and put them in temporary buffer
  2807. then get CrypOutBuff from temporary buffer */
  2808. temp[index] = hcryp->Instance->DOUTR;
  2809. }
  2810. for (index = 0U; index < lastwordsize; index++)
  2811. {
  2812. *(uint32_t *)(hcryp->pCrypOutBuffPtr + (hcryp->CrypOutCount)) = temp[index];
  2813. hcryp->CrypOutCount++;
  2814. }
  2815. }
  2816. /* Return function status */
  2817. return HAL_OK;
  2818. }
  2819. /**
  2820. * @brief Encryption/Decryption process in AES GCM mode and prepare the authentication TAG in interrupt mode
  2821. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  2822. * the configuration information for CRYP module
  2823. * @retval HAL status
  2824. */
  2825. static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp)
  2826. {
  2827. __IO uint32_t count = 0U;
  2828. uint32_t loopcounter;
  2829. uint32_t lastwordsize;
  2830. uint32_t npblb;
  2831. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  2832. uint32_t headersize_in_bytes;
  2833. uint32_t tmp;
  2834. static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
  2835. 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
  2836. 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
  2837. }; /* 8-bit data type */
  2838. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  2839. if ((hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED) || (hcryp->Phase == CRYP_PHASE_PAYLOAD_SUSPENDED))
  2840. {
  2841. CRYP_PhaseProcessingResume(hcryp);
  2842. return HAL_OK;
  2843. }
  2844. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  2845. /* Manage header size given in bytes to handle cases where
  2846. header size is not a multiple of 4 bytes */
  2847. if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
  2848. {
  2849. headersize_in_bytes = hcryp->Init.HeaderSize * 4U;
  2850. }
  2851. else
  2852. {
  2853. headersize_in_bytes = hcryp->Init.HeaderSize;
  2854. }
  2855. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  2856. {
  2857. if (hcryp->KeyIVConfig == 1U)
  2858. {
  2859. /* If the Key and IV configuration has to be done only once
  2860. and if it has already been done, skip it */
  2861. DoKeyIVConfig = 0U;
  2862. hcryp->SizesSum += hcryp->Size; /* Compute message total payload length */
  2863. }
  2864. else
  2865. {
  2866. /* If the Key and IV configuration has to be done only once
  2867. and if it has not been done already, do it and set KeyIVConfig
  2868. to keep track it won't have to be done again next time */
  2869. hcryp->KeyIVConfig = 1U;
  2870. hcryp->SizesSum = hcryp->Size; /* Merely store payload length */
  2871. }
  2872. }
  2873. else
  2874. {
  2875. hcryp->SizesSum = hcryp->Size;
  2876. }
  2877. /* Configure Key, IV and process message (header and payload) */
  2878. if (DoKeyIVConfig == 1U)
  2879. {
  2880. /* Reset CrypHeaderCount */
  2881. hcryp->CrypHeaderCount = 0U;
  2882. /******************************* Init phase *********************************/
  2883. CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
  2884. /* Set the key */
  2885. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  2886. /* Set the initialization vector and the counter : Initial Counter Block (ICB)*/
  2887. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  2888. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  2889. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  2890. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  2891. /* Enable the CRYP peripheral */
  2892. __HAL_CRYP_ENABLE(hcryp);
  2893. /* just wait for hash computation */
  2894. count = CRYP_TIMEOUT_GCMCCMINITPHASE;
  2895. do
  2896. {
  2897. count-- ;
  2898. if (count == 0U)
  2899. {
  2900. /* Disable the CRYP peripheral clock */
  2901. __HAL_CRYP_DISABLE(hcryp);
  2902. /* Change state */
  2903. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  2904. hcryp->State = HAL_CRYP_STATE_READY;
  2905. /* Process unlocked */
  2906. __HAL_UNLOCK(hcryp);
  2907. return HAL_ERROR;
  2908. }
  2909. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  2910. /* Clear CCF flag */
  2911. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2912. /***************************** Header phase *********************************/
  2913. /* Select header phase */
  2914. CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
  2915. /* Enable computation complete flag and error interrupts */
  2916. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  2917. /* Enable the CRYP peripheral */
  2918. __HAL_CRYP_ENABLE(hcryp);
  2919. if (hcryp->Init.HeaderSize == 0U) /*header phase is skipped*/
  2920. {
  2921. /* Set the phase */
  2922. hcryp->Phase = CRYP_PHASE_PROCESS;
  2923. /* Select payload phase once the header phase is performed */
  2924. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_PAYLOAD);
  2925. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  2926. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  2927. /* Write the payload Input block in the IN FIFO */
  2928. if (hcryp->Size == 0U)
  2929. {
  2930. /* Disable interrupts */
  2931. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  2932. /* Change the CRYP state */
  2933. hcryp->State = HAL_CRYP_STATE_READY;
  2934. /* Process unlocked */
  2935. __HAL_UNLOCK(hcryp);
  2936. }
  2937. else if (hcryp->Size >= 16U)
  2938. {
  2939. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2940. hcryp->CrypInCount++;
  2941. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2942. hcryp->CrypInCount++;
  2943. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2944. hcryp->CrypInCount++;
  2945. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2946. hcryp->CrypInCount++;
  2947. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  2948. {
  2949. /* Call Input transfer complete callback */
  2950. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2951. /*Call registered Input complete callback*/
  2952. hcryp->InCpltCallback(hcryp);
  2953. #else
  2954. /*Call legacy weak Input complete callback*/
  2955. HAL_CRYP_InCpltCallback(hcryp);
  2956. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  2957. }
  2958. }
  2959. else /* Size < 16Bytes : first block is the last block*/
  2960. {
  2961. /* Workaround not implemented for TinyAES2*/
  2962. /* Size should be %4 otherwise Tag will be incorrectly generated for GCM Encryption:
  2963. Workaround is implemented in polling mode, so if last block of
  2964. payload <128bit do not use CRYP_Encrypt_IT otherwise TAG is incorrectly generated for GCM Encryption. */
  2965. /* Compute the number of padding bytes in last block of payload */
  2966. npblb = 16U - ((uint32_t)hcryp->Size);
  2967. if ((hcryp->Instance->CR & AES_CR_MODE) == CRYP_OPERATINGMODE_ENCRYPT)
  2968. {
  2969. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  2970. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  2971. }
  2972. /* Number of valid words (lastwordsize) in last block */
  2973. if ((npblb % 4U) == 0U)
  2974. {
  2975. lastwordsize = (16U - npblb) / 4U;
  2976. }
  2977. else
  2978. {
  2979. lastwordsize = ((16U - npblb) / 4U) + 1U;
  2980. }
  2981. /* last block optionally pad the data with zeros*/
  2982. for (loopcounter = 0U; loopcounter < lastwordsize ; loopcounter++)
  2983. {
  2984. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  2985. hcryp->CrypInCount++;
  2986. }
  2987. while (loopcounter < 4U)
  2988. {
  2989. /* pad the data with zeros to have a complete block */
  2990. hcryp->Instance->DINR = 0x0U;
  2991. loopcounter++;
  2992. }
  2993. /* Call Input transfer complete callback */
  2994. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  2995. /*Call registered Input complete callback*/
  2996. hcryp->InCpltCallback(hcryp);
  2997. #else
  2998. /*Call legacy weak Input complete callback*/
  2999. HAL_CRYP_InCpltCallback(hcryp);
  3000. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3001. }
  3002. }
  3003. /* Enter header data */
  3004. /* Cher first whether header length is small enough to enter the full header in one shot */
  3005. else if (headersize_in_bytes <= 16U)
  3006. {
  3007. /* Write header data, padded with zeros if need be */
  3008. for (loopcounter = 0U; (loopcounter < (headersize_in_bytes / 4U)); loopcounter++)
  3009. {
  3010. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3011. hcryp->CrypHeaderCount++ ;
  3012. }
  3013. /* If the header size is a multiple of words */
  3014. if ((headersize_in_bytes % 4U) == 0U)
  3015. {
  3016. /* Pad the data with zeros to have a complete block */
  3017. while (loopcounter < 4U)
  3018. {
  3019. hcryp->Instance->DINR = 0x0U;
  3020. loopcounter++;
  3021. hcryp->CrypHeaderCount++;
  3022. }
  3023. }
  3024. else
  3025. {
  3026. /* Enter last bytes, padded with zeros */
  3027. tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3028. tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)];
  3029. hcryp->Instance->DINR = tmp;
  3030. loopcounter++;
  3031. hcryp->CrypHeaderCount++ ;
  3032. /* Pad the data with zeros to have a complete block */
  3033. while (loopcounter < 4U)
  3034. {
  3035. hcryp->Instance->DINR = 0x0U;
  3036. loopcounter++;
  3037. hcryp->CrypHeaderCount++;
  3038. }
  3039. }
  3040. }
  3041. else
  3042. {
  3043. /* Write the first input header block in the Input FIFO,
  3044. the following header data will be fed after interrupt occurrence */
  3045. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3046. hcryp->CrypHeaderCount++;
  3047. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3048. hcryp->CrypHeaderCount++;
  3049. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3050. hcryp->CrypHeaderCount++;
  3051. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3052. hcryp->CrypHeaderCount++;
  3053. }
  3054. } /* end of if (DoKeyIVConfig == 1U) */
  3055. else /* Key and IV have already been configured,
  3056. header has already been processed;
  3057. only process here message payload */
  3058. {
  3059. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  3060. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  3061. /* Write the payload Input block in the IN FIFO */
  3062. if (hcryp->Size == 0U)
  3063. {
  3064. /* Disable interrupts */
  3065. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3066. /* Change the CRYP state */
  3067. hcryp->State = HAL_CRYP_STATE_READY;
  3068. /* Process unlocked */
  3069. __HAL_UNLOCK(hcryp);
  3070. }
  3071. else if (hcryp->Size >= 16U)
  3072. {
  3073. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3074. hcryp->CrypInCount++;
  3075. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3076. hcryp->CrypInCount++;
  3077. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3078. hcryp->CrypInCount++;
  3079. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3080. hcryp->CrypInCount++;
  3081. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  3082. {
  3083. /* Call Input transfer complete callback */
  3084. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3085. /*Call registered Input complete callback*/
  3086. hcryp->InCpltCallback(hcryp);
  3087. #else
  3088. /*Call legacy weak Input complete callback*/
  3089. HAL_CRYP_InCpltCallback(hcryp);
  3090. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3091. }
  3092. /* Enable computation complete flag and error interrupts */
  3093. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3094. }
  3095. else /* Size < 16Bytes : first block is the last block*/
  3096. {
  3097. /* Workaround not implemented for TinyAES2*/
  3098. /* Size should be %4 otherwise Tag will be incorrectly generated for GCM Encryption:
  3099. Workaround is implemented in polling mode, so if last block of
  3100. payload <128bit do not use CRYP_Encrypt_IT otherwise TAG is incorrectly generated for GCM Encryption. */
  3101. /* Compute the number of padding bytes in last block of payload */
  3102. npblb = 16U - ((uint32_t)hcryp->Size);
  3103. if ((hcryp->Instance->CR & AES_CR_MODE) == CRYP_OPERATINGMODE_ENCRYPT)
  3104. {
  3105. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  3106. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  3107. }
  3108. /* Number of valid words (lastwordsize) in last block */
  3109. if ((npblb % 4U) == 0U)
  3110. {
  3111. lastwordsize = (16U - npblb) / 4U;
  3112. }
  3113. else
  3114. {
  3115. lastwordsize = ((16U - npblb) / 4U) + 1U;
  3116. }
  3117. /* last block optionally pad the data with zeros*/
  3118. for (loopcounter = 0U; loopcounter < lastwordsize ; loopcounter++)
  3119. {
  3120. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3121. hcryp->CrypInCount++;
  3122. }
  3123. while (loopcounter < 4U)
  3124. {
  3125. /* pad the data with zeros to have a complete block */
  3126. hcryp->Instance->DINR = 0x0U;
  3127. loopcounter++;
  3128. }
  3129. /* Call Input transfer complete callback */
  3130. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3131. /*Call registered Input complete callback*/
  3132. hcryp->InCpltCallback(hcryp);
  3133. #else
  3134. /*Call legacy weak Input complete callback*/
  3135. HAL_CRYP_InCpltCallback(hcryp);
  3136. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3137. /* Enable computation complete flag and error interrupts */
  3138. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3139. }
  3140. }
  3141. /* Return function status */
  3142. return HAL_OK;
  3143. }
  3144. /**
  3145. * @brief Encryption/Decryption process in AES GCM mode and prepare the authentication TAG using DMA
  3146. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  3147. * the configuration information for CRYP module
  3148. * @retval HAL status
  3149. */
  3150. static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp)
  3151. {
  3152. uint32_t count;
  3153. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  3154. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  3155. {
  3156. if (hcryp->KeyIVConfig == 1U)
  3157. {
  3158. /* If the Key and IV configuration has to be done only once
  3159. and if it has already been done, skip it */
  3160. DoKeyIVConfig = 0U;
  3161. hcryp->SizesSum += hcryp->Size; /* Compute message total payload length */
  3162. }
  3163. else
  3164. {
  3165. /* If the Key and IV configuration has to be done only once
  3166. and if it has not been done already, do it and set KeyIVConfig
  3167. to keep track it won't have to be done again next time */
  3168. hcryp->KeyIVConfig = 1U;
  3169. hcryp->SizesSum = hcryp->Size; /* Merely store payload length */
  3170. }
  3171. }
  3172. else
  3173. {
  3174. hcryp->SizesSum = hcryp->Size;
  3175. }
  3176. if (DoKeyIVConfig == 1U)
  3177. {
  3178. /* Reset CrypHeaderCount */
  3179. hcryp->CrypHeaderCount = 0U;
  3180. /*************************** Init phase ************************************/
  3181. CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
  3182. /* Set the key */
  3183. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  3184. /* Set the initialization vector and the counter : Initial Counter Block (ICB)*/
  3185. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.pInitVect);
  3186. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.pInitVect + 1U);
  3187. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.pInitVect + 2U);
  3188. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.pInitVect + 3U);
  3189. /* Enable the CRYP peripheral */
  3190. __HAL_CRYP_ENABLE(hcryp);
  3191. /* just wait for hash computation */
  3192. count = CRYP_TIMEOUT_GCMCCMINITPHASE;
  3193. do
  3194. {
  3195. count-- ;
  3196. if (count == 0U)
  3197. {
  3198. /* Disable the CRYP peripheral clock */
  3199. __HAL_CRYP_DISABLE(hcryp);
  3200. /* Change state */
  3201. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  3202. hcryp->State = HAL_CRYP_STATE_READY;
  3203. /* Process unlocked */
  3204. __HAL_UNLOCK(hcryp);
  3205. return HAL_ERROR;
  3206. }
  3207. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  3208. /* Clear CCF flag */
  3209. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  3210. /************************ Header phase *************************************/
  3211. if (CRYP_GCMCCM_SetHeaderPhase_DMA(hcryp) != HAL_OK)
  3212. {
  3213. return HAL_ERROR;
  3214. }
  3215. }
  3216. else
  3217. {
  3218. /* Initialization and header phases already done, only do payload phase */
  3219. if (CRYP_GCMCCM_SetPayloadPhase_DMA(hcryp) != HAL_OK)
  3220. {
  3221. return HAL_ERROR;
  3222. }
  3223. } /* if (DoKeyIVConfig == 1U) */
  3224. /* Return function status */
  3225. return HAL_OK;
  3226. }
  3227. /**
  3228. * @brief AES CCM encryption/decryption processing in polling mode
  3229. * for TinyAES peripheral, no encrypt/decrypt performed, only authentication preparation.
  3230. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  3231. * the configuration information for CRYP module
  3232. * @param Timeout Timeout duration
  3233. * @retval HAL status
  3234. */
  3235. static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  3236. {
  3237. uint32_t tickstart;
  3238. uint32_t wordsize = ((uint32_t)hcryp->Size / 4U) ;
  3239. uint32_t loopcounter;
  3240. uint32_t npblb;
  3241. uint32_t lastwordsize;
  3242. uint32_t temp[4] ; /* Temporary CrypOutBuff */
  3243. uint32_t incount; /* Temporary CrypInCount Value */
  3244. uint32_t outcount; /* Temporary CrypOutCount Value */
  3245. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  3246. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  3247. {
  3248. if (hcryp->KeyIVConfig == 1U)
  3249. {
  3250. /* If the Key and IV configuration has to be done only once
  3251. and if it has already been done, skip it */
  3252. DoKeyIVConfig = 0U;
  3253. hcryp->SizesSum += hcryp->Size; /* Compute message total payload length */
  3254. }
  3255. else
  3256. {
  3257. /* If the Key and IV configuration has to be done only once
  3258. and if it has not been done already, do it and set KeyIVConfig
  3259. to keep track it won't have to be done again next time */
  3260. hcryp->KeyIVConfig = 1U;
  3261. hcryp->SizesSum = hcryp->Size; /* Merely store payload length */
  3262. }
  3263. }
  3264. else
  3265. {
  3266. hcryp->SizesSum = hcryp->Size;
  3267. }
  3268. if (DoKeyIVConfig == 1U)
  3269. {
  3270. /* Reset CrypHeaderCount */
  3271. hcryp->CrypHeaderCount = 0U;
  3272. /********************** Init phase ******************************************/
  3273. CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
  3274. /* Set the key */
  3275. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  3276. /* Set the initialization vector (IV) with B0 */
  3277. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.B0);
  3278. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.B0 + 1U);
  3279. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.B0 + 2U);
  3280. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.B0 + 3U);
  3281. /* Enable the CRYP peripheral */
  3282. __HAL_CRYP_ENABLE(hcryp);
  3283. /* just wait for hash computation */
  3284. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  3285. {
  3286. /* Change state */
  3287. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  3288. hcryp->State = HAL_CRYP_STATE_READY;
  3289. /* Process unlocked & return error */
  3290. __HAL_UNLOCK(hcryp);
  3291. return HAL_ERROR;
  3292. }
  3293. /* Clear CCF flag */
  3294. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  3295. /************************ Header phase *************************************/
  3296. /* Header block(B1) : associated data length expressed in bytes concatenated
  3297. with Associated Data (A)*/
  3298. if (CRYP_GCMCCM_SetHeaderPhase(hcryp, Timeout) != HAL_OK)
  3299. {
  3300. return HAL_ERROR;
  3301. }
  3302. /*************************Payload phase ************************************/
  3303. /* Set the phase */
  3304. hcryp->Phase = CRYP_PHASE_PROCESS;
  3305. /* Select payload phase once the header phase is performed */
  3306. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_PAYLOAD);
  3307. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  3308. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  3309. } /* if (DoKeyIVConfig == 1U) */
  3310. if ((hcryp->Size % 16U) != 0U)
  3311. {
  3312. /* recalculate wordsize */
  3313. wordsize = ((wordsize / 4U) * 4U) ;
  3314. }
  3315. /* Get tick */
  3316. tickstart = HAL_GetTick();
  3317. /* Write input data and get output data */
  3318. incount = hcryp->CrypInCount;
  3319. outcount = hcryp->CrypOutCount;
  3320. while ((incount < wordsize) && (outcount < wordsize))
  3321. {
  3322. /* Write plain data and get cipher data */
  3323. CRYP_AES_ProcessData(hcryp, Timeout);
  3324. /* Check for the Timeout */
  3325. if (Timeout != HAL_MAX_DELAY)
  3326. {
  3327. if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  3328. {
  3329. /* Disable the CRYP peripheral clock */
  3330. __HAL_CRYP_DISABLE(hcryp);
  3331. /* Change state */
  3332. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  3333. hcryp->State = HAL_CRYP_STATE_READY;
  3334. /* Process unlocked */
  3335. __HAL_UNLOCK(hcryp);
  3336. return HAL_ERROR;
  3337. }
  3338. }
  3339. incount = hcryp->CrypInCount;
  3340. outcount = hcryp->CrypOutCount;
  3341. }
  3342. if ((hcryp->Size % 16U) != 0U)
  3343. {
  3344. /* Compute the number of padding bytes in last block of payload */
  3345. npblb = ((((uint32_t)hcryp->Size / 16U) + 1U) * 16U) - ((uint32_t)hcryp->Size);
  3346. if ((hcryp->Instance->CR & AES_CR_MODE) == CRYP_OPERATINGMODE_DECRYPT)
  3347. {
  3348. /* Set Npblb in case of AES CCM payload decryption to get right tag */
  3349. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20);
  3350. }
  3351. /* Number of valid words (lastwordsize) in last block */
  3352. if ((npblb % 4U) == 0U)
  3353. {
  3354. lastwordsize = (16U - npblb) / 4U;
  3355. }
  3356. else
  3357. {
  3358. lastwordsize = ((16U - npblb) / 4U) + 1U;
  3359. }
  3360. /* Write the last input block in the IN FIFO */
  3361. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter ++)
  3362. {
  3363. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3364. hcryp->CrypInCount++;
  3365. }
  3366. /* Pad the data with zeros to have a complete block */
  3367. while (loopcounter < 4U)
  3368. {
  3369. hcryp->Instance->DINR = 0U;
  3370. loopcounter++;
  3371. }
  3372. /* just wait for hash computation */
  3373. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  3374. {
  3375. /* Change state */
  3376. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  3377. hcryp->State = HAL_CRYP_STATE_READY;
  3378. /* Process unlocked & return error */
  3379. __HAL_UNLOCK(hcryp);
  3380. return HAL_ERROR;
  3381. }
  3382. /* Clear CCF flag */
  3383. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  3384. for (loopcounter = 0U; loopcounter < 4U; loopcounter++)
  3385. {
  3386. /* Read the output block from the output FIFO and put them in temporary buffer
  3387. then get CrypOutBuff from temporary buffer */
  3388. temp[loopcounter] = hcryp->Instance->DOUTR;
  3389. }
  3390. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter++)
  3391. {
  3392. *(uint32_t *)(hcryp->pCrypOutBuffPtr + hcryp->CrypOutCount) = temp[loopcounter];
  3393. hcryp->CrypOutCount++;
  3394. }
  3395. }
  3396. /* Return function status */
  3397. return HAL_OK;
  3398. }
  3399. /**
  3400. * @brief AES CCM encryption/decryption process in interrupt mode
  3401. * for TinyAES peripheral, no encrypt/decrypt performed, only authentication preparation.
  3402. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  3403. * the configuration information for CRYP module
  3404. * @retval HAL status
  3405. */
  3406. static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp)
  3407. {
  3408. __IO uint32_t count = 0U;
  3409. uint32_t loopcounter;
  3410. uint32_t lastwordsize;
  3411. uint32_t npblb;
  3412. uint32_t mode;
  3413. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  3414. uint32_t headersize_in_bytes;
  3415. uint32_t tmp;
  3416. static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
  3417. 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
  3418. 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
  3419. }; /* 8-bit data type */
  3420. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  3421. if ((hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED) || (hcryp->Phase == CRYP_PHASE_PAYLOAD_SUSPENDED))
  3422. {
  3423. CRYP_PhaseProcessingResume(hcryp);
  3424. return HAL_OK;
  3425. }
  3426. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  3427. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  3428. {
  3429. if (hcryp->KeyIVConfig == 1U)
  3430. {
  3431. /* If the Key and IV configuration has to be done only once
  3432. and if it has already been done, skip it */
  3433. DoKeyIVConfig = 0U;
  3434. hcryp->SizesSum += hcryp->Size; /* Compute message total payload length */
  3435. }
  3436. else
  3437. {
  3438. /* If the Key and IV configuration has to be done only once
  3439. and if it has not been done already, do it and set KeyIVConfig
  3440. to keep track it won't have to be done again next time */
  3441. hcryp->KeyIVConfig = 1U;
  3442. hcryp->SizesSum = hcryp->Size; /* Merely store payload length */
  3443. }
  3444. }
  3445. else
  3446. {
  3447. hcryp->SizesSum = hcryp->Size;
  3448. }
  3449. /* Configure Key, IV and process message (header and payload) */
  3450. if (DoKeyIVConfig == 1U)
  3451. {
  3452. /* Reset CrypHeaderCount */
  3453. hcryp->CrypHeaderCount = 0U;
  3454. /********************** Init phase ******************************************/
  3455. CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
  3456. /* Set the key */
  3457. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  3458. /* Set the initialization vector (IV) with B0 */
  3459. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.B0);
  3460. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.B0 + 1U);
  3461. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.B0 + 2U);
  3462. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.B0 + 3U);
  3463. /* Enable the CRYP peripheral */
  3464. __HAL_CRYP_ENABLE(hcryp);
  3465. /* just wait for hash computation */
  3466. count = CRYP_TIMEOUT_GCMCCMINITPHASE;
  3467. do
  3468. {
  3469. count-- ;
  3470. if (count == 0U)
  3471. {
  3472. /* Disable the CRYP peripheral clock */
  3473. __HAL_CRYP_DISABLE(hcryp);
  3474. /* Change state */
  3475. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  3476. hcryp->State = HAL_CRYP_STATE_READY;
  3477. /* Process unlocked */
  3478. __HAL_UNLOCK(hcryp);
  3479. return HAL_ERROR;
  3480. }
  3481. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  3482. /* Clear CCF flag */
  3483. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  3484. /***************************** Header phase *********************************/
  3485. /* Select header phase */
  3486. CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
  3487. /* Enable computation complete flag and error interrupts */
  3488. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3489. /* Enable the CRYP peripheral */
  3490. __HAL_CRYP_ENABLE(hcryp);
  3491. if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
  3492. {
  3493. headersize_in_bytes = hcryp->Init.HeaderSize * 4U;
  3494. }
  3495. else
  3496. {
  3497. headersize_in_bytes = hcryp->Init.HeaderSize;
  3498. }
  3499. if (headersize_in_bytes == 0U) /* Header phase is skipped */
  3500. {
  3501. /* Set the phase */
  3502. hcryp->Phase = CRYP_PHASE_PROCESS;
  3503. /* Select payload phase once the header phase is performed */
  3504. CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
  3505. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  3506. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  3507. if (hcryp->Init.Algorithm == CRYP_AES_CCM)
  3508. {
  3509. /* Increment CrypHeaderCount to pass in CRYP_GCMCCM_SetPayloadPhase_IT */
  3510. hcryp->CrypHeaderCount++;
  3511. }
  3512. /* Write the payload Input block in the IN FIFO */
  3513. if (hcryp->Size == 0U)
  3514. {
  3515. /* Disable interrupts */
  3516. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3517. /* Change the CRYP state */
  3518. hcryp->State = HAL_CRYP_STATE_READY;
  3519. /* Process unlocked */
  3520. __HAL_UNLOCK(hcryp);
  3521. }
  3522. else if (hcryp->Size >= 16U)
  3523. {
  3524. hcryp->CrypInCount++;
  3525. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3526. hcryp->CrypInCount++;
  3527. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3528. hcryp->CrypInCount++;
  3529. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3530. hcryp->CrypInCount++;
  3531. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3532. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  3533. {
  3534. /* Call Input transfer complete callback */
  3535. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3536. /*Call registered Input complete callback*/
  3537. hcryp->InCpltCallback(hcryp);
  3538. #else
  3539. /*Call legacy weak Input complete callback*/
  3540. HAL_CRYP_InCpltCallback(hcryp);
  3541. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3542. }
  3543. }
  3544. else /* Size < 4 words : first block is the last block*/
  3545. {
  3546. /* Compute the number of padding bytes in last block of payload */
  3547. npblb = 16U - (uint32_t)hcryp->Size;
  3548. mode = hcryp->Instance->CR & AES_CR_MODE;
  3549. if (((mode == CRYP_OPERATINGMODE_ENCRYPT) && (hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC)) ||
  3550. ((mode == CRYP_OPERATINGMODE_DECRYPT) && (hcryp->Init.Algorithm == CRYP_AES_CCM)))
  3551. {
  3552. /* Specify the number of non-valid bytes using NPBLB register*/
  3553. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  3554. }
  3555. /* Number of valid words (lastwordsize) in last block */
  3556. if ((npblb % 4U) == 0U)
  3557. {
  3558. lastwordsize = (16U - npblb) / 4U;
  3559. }
  3560. else
  3561. {
  3562. lastwordsize = ((16U - npblb) / 4U) + 1U;
  3563. }
  3564. /* Last block optionally pad the data with zeros*/
  3565. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter++)
  3566. {
  3567. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3568. hcryp->CrypInCount++;
  3569. }
  3570. while (loopcounter < 4U)
  3571. {
  3572. /* Pad the data with zeros to have a complete block */
  3573. hcryp->Instance->DINR = 0x0U;
  3574. loopcounter++;
  3575. }
  3576. /* Call Input transfer complete callback */
  3577. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3578. /*Call registered Input complete callback*/
  3579. hcryp->InCpltCallback(hcryp);
  3580. #else
  3581. /*Call legacy weak Input complete callback*/
  3582. HAL_CRYP_InCpltCallback(hcryp);
  3583. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3584. }
  3585. }
  3586. /* Enter header data */
  3587. /* Check first whether header length is small enough to enter the full header in one shot */
  3588. else if (headersize_in_bytes <= 16U)
  3589. {
  3590. for (loopcounter = 0U; (loopcounter < (headersize_in_bytes / 4U)); loopcounter++)
  3591. {
  3592. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3593. hcryp->CrypHeaderCount++ ;
  3594. }
  3595. /* If the header size is a multiple of words */
  3596. if ((headersize_in_bytes % 4U) == 0U)
  3597. {
  3598. /* Pad the data with zeros to have a complete block */
  3599. while (loopcounter < 4U)
  3600. {
  3601. hcryp->Instance->DINR = 0x0U;
  3602. loopcounter++;
  3603. }
  3604. }
  3605. else
  3606. {
  3607. /* Enter last bytes, padded with zeros */
  3608. tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  3609. tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)];
  3610. hcryp->Instance->DINR = tmp;
  3611. hcryp->CrypHeaderCount++;
  3612. loopcounter++;
  3613. /* Pad the data with zeros to have a complete block */
  3614. while (loopcounter < 4U)
  3615. {
  3616. hcryp->Instance->DINR = 0x0U;
  3617. loopcounter++;
  3618. }
  3619. }
  3620. /* Call Input transfer complete callback */
  3621. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3622. /*Call registered Input complete callback*/
  3623. hcryp->InCpltCallback(hcryp);
  3624. #else
  3625. /*Call legacy weak Input complete callback*/
  3626. HAL_CRYP_InCpltCallback(hcryp);
  3627. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3628. }
  3629. else
  3630. {
  3631. /* Write the first input header block in the Input FIFO,
  3632. the following header data will be fed after interrupt occurrence */
  3633. hcryp->CrypHeaderCount++;
  3634. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount - 1U);
  3635. hcryp->CrypHeaderCount++;
  3636. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount - 1U);
  3637. hcryp->CrypHeaderCount++;
  3638. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount - 1U);
  3639. hcryp->CrypHeaderCount++;
  3640. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount - 1U);
  3641. }/* if (hcryp->Init.HeaderSize == 0U) */ /* Header phase is skipped*/
  3642. } /* end of if (dokeyivconfig == 1U) */
  3643. else /* Key and IV have already been configured,
  3644. header has already been processed;
  3645. only process here message payload */
  3646. {
  3647. /* Write the payload Input block in the IN FIFO */
  3648. if (hcryp->Size == 0U)
  3649. {
  3650. /* Disable interrupts */
  3651. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3652. /* Change the CRYP state */
  3653. hcryp->State = HAL_CRYP_STATE_READY;
  3654. /* Process unlocked */
  3655. __HAL_UNLOCK(hcryp);
  3656. }
  3657. else if (hcryp->Size >= 16U)
  3658. {
  3659. hcryp->CrypInCount++;
  3660. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3661. hcryp->CrypInCount++;
  3662. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3663. hcryp->CrypInCount++;
  3664. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3665. hcryp->CrypInCount++;
  3666. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + (hcryp->CrypInCount - 1U));
  3667. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  3668. {
  3669. /* Call Input transfer complete callback */
  3670. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3671. /*Call registered Input complete callback*/
  3672. hcryp->InCpltCallback(hcryp);
  3673. #else
  3674. /*Call legacy weak Input complete callback*/
  3675. HAL_CRYP_InCpltCallback(hcryp);
  3676. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3677. }
  3678. }
  3679. else /* Size < 4 words : first block is the last block*/
  3680. {
  3681. /* Compute the number of padding bytes in last block of payload */
  3682. npblb = 16U - (uint32_t)hcryp->Size;
  3683. mode = hcryp->Instance->CR & AES_CR_MODE;
  3684. if (((mode == CRYP_OPERATINGMODE_ENCRYPT) && (hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC)) ||
  3685. ((mode == CRYP_OPERATINGMODE_DECRYPT) && (hcryp->Init.Algorithm == CRYP_AES_CCM)))
  3686. {
  3687. /* Specify the number of non-valid bytes using NPBLB register*/
  3688. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  3689. }
  3690. /* Number of valid words (lastwordsize) in last block */
  3691. if ((npblb % 4U) == 0U)
  3692. {
  3693. lastwordsize = (16U - npblb) / 4U;
  3694. }
  3695. else
  3696. {
  3697. lastwordsize = ((16U - npblb) / 4U) + 1U;
  3698. }
  3699. /* Last block optionally pad the data with zeros*/
  3700. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter++)
  3701. {
  3702. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3703. hcryp->CrypInCount++;
  3704. }
  3705. while (loopcounter < 4U)
  3706. {
  3707. /* Pad the data with zeros to have a complete block */
  3708. hcryp->Instance->DINR = 0x0U;
  3709. loopcounter++;
  3710. }
  3711. /* Call Input transfer complete callback */
  3712. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3713. /*Call registered Input complete callback*/
  3714. hcryp->InCpltCallback(hcryp);
  3715. #else
  3716. /*Call legacy weak Input complete callback*/
  3717. HAL_CRYP_InCpltCallback(hcryp);
  3718. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3719. }
  3720. }
  3721. /* Return function status */
  3722. return HAL_OK;
  3723. }
  3724. /**
  3725. * @brief AES CCM encryption/decryption process in DMA mode
  3726. * for TinyAES peripheral, no encrypt/decrypt performed, only authentication preparation.
  3727. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  3728. * the configuration information for CRYP module
  3729. * @retval HAL status
  3730. */
  3731. static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp)
  3732. {
  3733. uint32_t count;
  3734. uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
  3735. if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE)
  3736. {
  3737. if (hcryp->KeyIVConfig == 1U)
  3738. {
  3739. /* If the Key and IV configuration has to be done only once
  3740. and if it has already been done, skip it */
  3741. DoKeyIVConfig = 0U;
  3742. hcryp->SizesSum += hcryp->Size; /* Compute message total payload length */
  3743. }
  3744. else
  3745. {
  3746. /* If the Key and IV configuration has to be done only once
  3747. and if it has not been done already, do it and set KeyIVConfig
  3748. to keep track it won't have to be done again next time */
  3749. hcryp->KeyIVConfig = 1U;
  3750. hcryp->SizesSum = hcryp->Size; /* Merely store payload length */
  3751. }
  3752. }
  3753. else
  3754. {
  3755. hcryp->SizesSum = hcryp->Size;
  3756. }
  3757. if (DoKeyIVConfig == 1U)
  3758. {
  3759. /* Reset CrypHeaderCount */
  3760. hcryp->CrypHeaderCount = 0U;
  3761. /********************** Init phase ******************************************/
  3762. CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
  3763. /* Set the key */
  3764. CRYP_SetKey(hcryp, hcryp->Init.KeySize);
  3765. /* Set the initialization vector (IV) with B0 */
  3766. hcryp->Instance->IVR3 = *(uint32_t *)(hcryp->Init.B0);
  3767. hcryp->Instance->IVR2 = *(uint32_t *)(hcryp->Init.B0 + 1U);
  3768. hcryp->Instance->IVR1 = *(uint32_t *)(hcryp->Init.B0 + 2U);
  3769. hcryp->Instance->IVR0 = *(uint32_t *)(hcryp->Init.B0 + 3U);
  3770. /* Enable the CRYP peripheral */
  3771. __HAL_CRYP_ENABLE(hcryp);
  3772. /* just wait for hash computation */
  3773. count = CRYP_TIMEOUT_GCMCCMINITPHASE;
  3774. do
  3775. {
  3776. count-- ;
  3777. if (count == 0U)
  3778. {
  3779. /* Disable the CRYP peripheral clock */
  3780. __HAL_CRYP_DISABLE(hcryp);
  3781. /* Change state */
  3782. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  3783. hcryp->State = HAL_CRYP_STATE_READY;
  3784. /* Process unlocked */
  3785. __HAL_UNLOCK(hcryp);
  3786. return HAL_ERROR;
  3787. }
  3788. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  3789. /* Clear CCF flag */
  3790. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  3791. /********************* Header phase *****************************************/
  3792. if (CRYP_GCMCCM_SetHeaderPhase_DMA(hcryp) != HAL_OK)
  3793. {
  3794. return HAL_ERROR;
  3795. }
  3796. }
  3797. else
  3798. {
  3799. /* Initialization and header phases already done, only do payload phase */
  3800. if (CRYP_GCMCCM_SetPayloadPhase_DMA(hcryp) != HAL_OK)
  3801. {
  3802. return HAL_ERROR;
  3803. }
  3804. } /* if (DoKeyIVConfig == 1U) */
  3805. /* Return function status */
  3806. return HAL_OK;
  3807. }
  3808. /**
  3809. * @brief Sets the payload phase in interrupt mode
  3810. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  3811. * the configuration information for CRYP module
  3812. * @retval state
  3813. */
  3814. static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp)
  3815. {
  3816. uint32_t loopcounter;
  3817. uint32_t temp[4]; /* Temporary CrypOutBuff */
  3818. uint32_t lastwordsize;
  3819. uint32_t npblb;
  3820. uint32_t mode;
  3821. uint16_t incount; /* Temporary CrypInCount Value */
  3822. uint16_t outcount; /* Temporary CrypOutCount Value */
  3823. uint32_t i;
  3824. /***************************** Payload phase *******************************/
  3825. /* Read the output block from the output FIFO and put them in temporary buffer
  3826. then get CrypOutBuff from temporary buffer*/
  3827. for (i = 0U; i < 4U; i++)
  3828. {
  3829. temp[i] = hcryp->Instance->DOUTR;
  3830. }
  3831. i = 0U;
  3832. while ((hcryp->CrypOutCount < ((hcryp->Size + 3U) / 4U)) && (i < 4U))
  3833. {
  3834. *(uint32_t *)(hcryp->pCrypOutBuffPtr + hcryp->CrypOutCount) = temp[i];
  3835. hcryp->CrypOutCount++;
  3836. i++;
  3837. }
  3838. incount = hcryp->CrypInCount;
  3839. outcount = hcryp->CrypOutCount;
  3840. if ((outcount >= (hcryp->Size / 4U)) && ((incount * 4U) >= hcryp->Size))
  3841. {
  3842. /* When in CCM with Key and IV configuration skipped, don't disable interruptions */
  3843. if (!((hcryp->Init.Algorithm == CRYP_AES_CCM) && (hcryp->KeyIVConfig == 1U)))
  3844. {
  3845. /* Disable computation complete flag and errors interrupts */
  3846. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3847. }
  3848. /* Change the CRYP state */
  3849. hcryp->State = HAL_CRYP_STATE_READY;
  3850. /* Process unlocked */
  3851. __HAL_UNLOCK(hcryp);
  3852. /* Call output transfer complete callback */
  3853. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3854. /*Call registered Output complete callback*/
  3855. hcryp->OutCpltCallback(hcryp);
  3856. #else
  3857. /*Call legacy weak Output complete callback*/
  3858. HAL_CRYP_OutCpltCallback(hcryp);
  3859. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3860. }
  3861. else if (((hcryp->Size / 4U) - (hcryp->CrypInCount)) >= 4U)
  3862. {
  3863. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  3864. /* If suspension flag has been raised, suspend processing
  3865. only if not already at the end of the payload */
  3866. if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
  3867. {
  3868. /* Clear CCF Flag */
  3869. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  3870. /* reset SuspendRequest */
  3871. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  3872. /* Disable Computation Complete Flag and Errors Interrupts */
  3873. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  3874. /* Change the CRYP state */
  3875. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  3876. /* Mark that the payload phase is suspended */
  3877. hcryp->Phase = CRYP_PHASE_PAYLOAD_SUSPENDED;
  3878. /* Process Unlocked */
  3879. __HAL_UNLOCK(hcryp);
  3880. }
  3881. else
  3882. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  3883. {
  3884. /* Write the input block in the IN FIFO */
  3885. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3886. hcryp->CrypInCount++;
  3887. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3888. hcryp->CrypInCount++;
  3889. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3890. hcryp->CrypInCount++;
  3891. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3892. hcryp->CrypInCount++;
  3893. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  3894. {
  3895. /* Call input transfer complete callback */
  3896. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3897. /*Call registered Input complete callback*/
  3898. hcryp->InCpltCallback(hcryp);
  3899. #else
  3900. /*Call legacy weak Input complete callback*/
  3901. HAL_CRYP_InCpltCallback(hcryp);
  3902. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3903. }
  3904. }
  3905. }
  3906. else /* Last block of payload < 128bit*/
  3907. {
  3908. /* Compute the number of padding bytes in last block of payload */
  3909. npblb = ((((uint32_t)hcryp->Size / 16U) + 1U) * 16U) - ((uint32_t)hcryp->Size);
  3910. mode = hcryp->Instance->CR & AES_CR_MODE;
  3911. if (((mode == CRYP_OPERATINGMODE_ENCRYPT) && (hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC)) ||
  3912. ((mode == CRYP_OPERATINGMODE_DECRYPT) && (hcryp->Init.Algorithm == CRYP_AES_CCM)))
  3913. {
  3914. /* Specify the number of non-valid bytes using NPBLB register*/
  3915. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  3916. }
  3917. /* Number of valid words (lastwordsize) in last block */
  3918. if ((npblb % 4U) == 0U)
  3919. {
  3920. lastwordsize = (16U - npblb) / 4U;
  3921. }
  3922. else
  3923. {
  3924. lastwordsize = ((16U - npblb) / 4U) + 1U;
  3925. }
  3926. /* Last block optionally pad the data with zeros*/
  3927. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter++)
  3928. {
  3929. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  3930. hcryp->CrypInCount++;
  3931. }
  3932. while (loopcounter < 4U)
  3933. {
  3934. /* pad the data with zeros to have a complete block */
  3935. hcryp->Instance->DINR = 0x0U;
  3936. loopcounter++;
  3937. }
  3938. /* Call input transfer complete callback */
  3939. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  3940. /*Call registered Input complete callback*/
  3941. hcryp->InCpltCallback(hcryp);
  3942. #else
  3943. /*Call legacy weak Input complete callback*/
  3944. HAL_CRYP_InCpltCallback(hcryp);
  3945. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  3946. }
  3947. }
  3948. /**
  3949. * @brief Sets the payload phase in DMA mode
  3950. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  3951. * the configuration information for CRYP module
  3952. * @retval state
  3953. */
  3954. static HAL_StatusTypeDef CRYP_GCMCCM_SetPayloadPhase_DMA(CRYP_HandleTypeDef *hcryp)
  3955. {
  3956. uint16_t wordsize = hcryp->Size / 4U ;
  3957. uint32_t index;
  3958. uint32_t npblb;
  3959. uint32_t lastwordsize;
  3960. uint32_t temp[4]; /* Temporary CrypOutBuff */
  3961. uint32_t count;
  3962. uint32_t reg;
  3963. /************************ Payload phase ************************************/
  3964. if (hcryp->Size == 0U)
  3965. {
  3966. /* Process unLocked */
  3967. __HAL_UNLOCK(hcryp);
  3968. /* Change the CRYP state and phase */
  3969. hcryp->State = HAL_CRYP_STATE_READY;
  3970. }
  3971. else if (hcryp->Size >= 16U)
  3972. {
  3973. /*DMA transfer must not include the last block in case of Size is not %16 */
  3974. wordsize = wordsize - (wordsize % 4U);
  3975. /*DMA transfer */
  3976. CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), wordsize, (uint32_t)(hcryp->pCrypOutBuffPtr));
  3977. }
  3978. else /* length of input data is < 16 */
  3979. {
  3980. /* Compute the number of padding bytes in last block of payload */
  3981. npblb = 16U - (uint32_t)hcryp->Size;
  3982. /* Set Npblb in case of AES GCM payload encryption or AES CCM payload decryption to get right tag*/
  3983. reg = hcryp->Instance->CR & (AES_CR_CHMOD | AES_CR_MODE);
  3984. if ((reg == (CRYP_AES_GCM_GMAC | CRYP_OPERATINGMODE_ENCRYPT)) || \
  3985. (reg == (CRYP_AES_CCM | CRYP_OPERATINGMODE_DECRYPT)))
  3986. {
  3987. /* Specify the number of non-valid bytes using NPBLB register*/
  3988. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  3989. }
  3990. /* Number of valid words (lastwordsize) in last block */
  3991. if ((npblb % 4U) == 0U)
  3992. {
  3993. lastwordsize = (16U - npblb) / 4U;
  3994. }
  3995. else
  3996. {
  3997. lastwordsize = ((16U - npblb) / 4U) + 1U;
  3998. }
  3999. /* last block optionally pad the data with zeros*/
  4000. for (index = 0U; index < lastwordsize; index ++)
  4001. {
  4002. /* Write the last Input block in the IN FIFO */
  4003. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4004. hcryp->CrypInCount++;
  4005. }
  4006. while (index < 4U)
  4007. {
  4008. /* pad the data with zeros to have a complete block */
  4009. hcryp->Instance->DINR = 0U;
  4010. index++;
  4011. }
  4012. /* Call the input data transfer complete callback */
  4013. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  4014. /*Call registered Input complete callback*/
  4015. hcryp->InCpltCallback(hcryp);
  4016. #else
  4017. /*Call legacy weak Input complete callback*/
  4018. HAL_CRYP_InCpltCallback(hcryp);
  4019. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  4020. /* Wait for CCF flag to be raised */
  4021. count = CRYP_TIMEOUT_GCMCCMHEADERPHASE;
  4022. do
  4023. {
  4024. count-- ;
  4025. if (count == 0U)
  4026. {
  4027. /* Disable the CRYP peripheral clock */
  4028. __HAL_CRYP_DISABLE(hcryp);
  4029. /* Change state */
  4030. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4031. hcryp->State = HAL_CRYP_STATE_READY;
  4032. /* Process unlocked */
  4033. __HAL_UNLOCK(hcryp);
  4034. return HAL_ERROR;
  4035. }
  4036. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  4037. /* Clear CCF Flag */
  4038. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4039. /*Read the output block from the output FIFO */
  4040. for (index = 0U; index < 4U; index++)
  4041. {
  4042. /* Read the output block from the output FIFO and put them in temporary buffer
  4043. then get CrypOutBuff from temporary buffer */
  4044. temp[index] = hcryp->Instance->DOUTR;
  4045. }
  4046. for (index = 0U; index < lastwordsize; index++)
  4047. {
  4048. *(uint32_t *)(hcryp->pCrypOutBuffPtr + hcryp->CrypOutCount) = temp[index];
  4049. hcryp->CrypOutCount++;
  4050. }
  4051. /* Change the CRYP state to ready */
  4052. hcryp->State = HAL_CRYP_STATE_READY;
  4053. /* Process unlocked */
  4054. __HAL_UNLOCK(hcryp);
  4055. /* Call Output transfer complete callback */
  4056. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  4057. /*Call registered Output complete callback*/
  4058. hcryp->OutCpltCallback(hcryp);
  4059. #else
  4060. /*Call legacy weak Output complete callback*/
  4061. HAL_CRYP_OutCpltCallback(hcryp);
  4062. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  4063. }
  4064. return HAL_OK;
  4065. }
  4066. /**
  4067. * @brief Sets the header phase in polling mode
  4068. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4069. * the configuration information for CRYP module(Header & HeaderSize)
  4070. * @param Timeout Timeout value
  4071. * @retval state
  4072. */
  4073. static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  4074. {
  4075. uint32_t loopcounter;
  4076. uint32_t size_in_bytes;
  4077. uint32_t tmp;
  4078. static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
  4079. 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
  4080. 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
  4081. }; /* 8-bit data type */
  4082. /***************************** Header phase for GCM/GMAC or CCM *********************************/
  4083. if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
  4084. {
  4085. size_in_bytes = hcryp->Init.HeaderSize * 4U;
  4086. }
  4087. else
  4088. {
  4089. size_in_bytes = hcryp->Init.HeaderSize;
  4090. }
  4091. if ((size_in_bytes != 0U))
  4092. {
  4093. /* Select header phase */
  4094. CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
  4095. /* Enable the CRYP peripheral */
  4096. __HAL_CRYP_ENABLE(hcryp);
  4097. /* If size_in_bytes is a multiple of blocks (a multiple of four 32-bits words ) */
  4098. if ((size_in_bytes % 16U) == 0U)
  4099. {
  4100. /* No padding */
  4101. for (loopcounter = 0U; (loopcounter < (size_in_bytes / 4U)); loopcounter += 4U)
  4102. {
  4103. /* Write the input block in the data input register */
  4104. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4105. hcryp->CrypHeaderCount++ ;
  4106. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4107. hcryp->CrypHeaderCount++ ;
  4108. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4109. hcryp->CrypHeaderCount++ ;
  4110. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4111. hcryp->CrypHeaderCount++ ;
  4112. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  4113. {
  4114. /* Disable the CRYP peripheral clock */
  4115. __HAL_CRYP_DISABLE(hcryp);
  4116. /* Change state */
  4117. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4118. hcryp->State = HAL_CRYP_STATE_READY;
  4119. /* Process unlocked */
  4120. __HAL_UNLOCK(hcryp);
  4121. return HAL_ERROR;
  4122. }
  4123. /* Clear CCF flag */
  4124. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4125. }
  4126. }
  4127. else
  4128. {
  4129. /* Write header block in the IN FIFO without last block */
  4130. for (loopcounter = 0U; (loopcounter < ((size_in_bytes / 16U) * 4U)); loopcounter += 4U)
  4131. {
  4132. /* Write the input block in the data input register */
  4133. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4134. hcryp->CrypHeaderCount++ ;
  4135. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4136. hcryp->CrypHeaderCount++ ;
  4137. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4138. hcryp->CrypHeaderCount++ ;
  4139. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4140. hcryp->CrypHeaderCount++ ;
  4141. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  4142. {
  4143. /* Disable the CRYP peripheral clock */
  4144. __HAL_CRYP_DISABLE(hcryp);
  4145. /* Change state */
  4146. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4147. hcryp->State = HAL_CRYP_STATE_READY;
  4148. /* Process unlocked */
  4149. __HAL_UNLOCK(hcryp);
  4150. return HAL_ERROR;
  4151. }
  4152. /* Clear CCF flag */
  4153. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4154. }
  4155. /* Write last complete words */
  4156. for (loopcounter = 0U; (loopcounter < ((size_in_bytes / 4U) % 4U)); loopcounter++)
  4157. {
  4158. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4159. hcryp->CrypHeaderCount++ ;
  4160. }
  4161. /* If the header size is a multiple of words */
  4162. if ((size_in_bytes % 4U) == 0U)
  4163. {
  4164. /* Pad the data with zeros to have a complete block */
  4165. while (loopcounter < 4U)
  4166. {
  4167. hcryp->Instance->DINR = 0x0U;
  4168. loopcounter++;
  4169. }
  4170. }
  4171. else
  4172. {
  4173. /* Enter last bytes, padded with zeros */
  4174. tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4175. tmp &= mask[(hcryp->Init.DataType * 2U) + (size_in_bytes % 4U)];
  4176. hcryp->Instance->DINR = tmp;
  4177. loopcounter++;
  4178. /* Pad the data with zeros to have a complete block */
  4179. while (loopcounter < 4U)
  4180. {
  4181. hcryp->Instance->DINR = 0x0U;
  4182. loopcounter++;
  4183. }
  4184. }
  4185. if (CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  4186. {
  4187. /* Disable the CRYP peripheral clock */
  4188. __HAL_CRYP_DISABLE(hcryp);
  4189. /* Change state */
  4190. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4191. hcryp->State = HAL_CRYP_STATE_READY;
  4192. /* Process unlocked */
  4193. __HAL_UNLOCK(hcryp);
  4194. return HAL_ERROR;
  4195. }
  4196. /* Clear CCF flag */
  4197. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4198. }
  4199. }
  4200. else
  4201. {
  4202. /*Workaround 1: only AES, before re-enabling the peripheral, datatype can be configured.*/
  4203. MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
  4204. /* Select header phase */
  4205. CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
  4206. /* Enable the CRYP peripheral */
  4207. __HAL_CRYP_ENABLE(hcryp);
  4208. }
  4209. /* Return function status */
  4210. return HAL_OK;
  4211. }
  4212. /**
  4213. * @brief Sets the header phase when using DMA in process
  4214. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4215. * the configuration information for CRYP module(Header & HeaderSize)
  4216. * @retval None
  4217. */
  4218. static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcryp)
  4219. {
  4220. uint32_t loopcounter;
  4221. uint32_t headersize_in_bytes;
  4222. uint32_t tmp;
  4223. static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
  4224. 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
  4225. 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
  4226. }; /* 8-bit data type */
  4227. /***************************** Header phase for GCM/GMAC or CCM *********************************/
  4228. if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
  4229. {
  4230. headersize_in_bytes = hcryp->Init.HeaderSize * 4U;
  4231. }
  4232. else
  4233. {
  4234. headersize_in_bytes = hcryp->Init.HeaderSize;
  4235. }
  4236. /* Select header phase */
  4237. CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
  4238. /* Enable the CRYP peripheral */
  4239. __HAL_CRYP_ENABLE(hcryp);
  4240. /* Set the phase */
  4241. hcryp->Phase = CRYP_PHASE_PROCESS;
  4242. /* If header size is at least equal to 16 bytes, feed the header through DMA.
  4243. If size_in_bytes is not a multiple of blocks (is not a multiple of four 32-bit words ),
  4244. last bytes feeding and padding will be done in CRYP_DMAInCplt() */
  4245. if (headersize_in_bytes >= 16U)
  4246. {
  4247. /* Initiate header DMA transfer */
  4248. if (CRYP_SetHeaderDMAConfig(hcryp, (uint32_t)(hcryp->Init.Header),
  4249. (uint16_t)((headersize_in_bytes / 16U) * 4U)) != HAL_OK)
  4250. {
  4251. return HAL_ERROR;
  4252. }
  4253. }
  4254. else
  4255. {
  4256. if (headersize_in_bytes != 0U)
  4257. {
  4258. /* Header length is larger than 0 and strictly less than 16 bytes */
  4259. /* Write last complete words */
  4260. for (loopcounter = 0U; (loopcounter < (headersize_in_bytes / 4U)); loopcounter++)
  4261. {
  4262. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4263. hcryp->CrypHeaderCount++ ;
  4264. }
  4265. /* If the header size is a multiple of words */
  4266. if ((headersize_in_bytes % 4U) == 0U)
  4267. {
  4268. /* Pad the data with zeros to have a complete block */
  4269. while (loopcounter < 4U)
  4270. {
  4271. hcryp->Instance->DINR = 0x0U;
  4272. loopcounter++;
  4273. }
  4274. }
  4275. else
  4276. {
  4277. /* Enter last bytes, padded with zeros */
  4278. tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4279. tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)];
  4280. hcryp->Instance->DINR = tmp;
  4281. loopcounter++;
  4282. /* Pad the data with zeros to have a complete block */
  4283. while (loopcounter < 4U)
  4284. {
  4285. hcryp->Instance->DINR = 0x0U;
  4286. loopcounter++;
  4287. }
  4288. }
  4289. if (CRYP_WaitOnCCFlag(hcryp, CRYP_TIMEOUT_GCMCCMHEADERPHASE) != HAL_OK)
  4290. {
  4291. /* Disable the CRYP peripheral clock */
  4292. __HAL_CRYP_DISABLE(hcryp);
  4293. /* Change state */
  4294. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4295. hcryp->State = HAL_CRYP_STATE_READY;
  4296. /* Process unlocked */
  4297. __HAL_UNLOCK(hcryp);
  4298. return HAL_ERROR;
  4299. }
  4300. /* Clear CCF flag */
  4301. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4302. } /* if (headersize_in_bytes != 0U) */
  4303. /* Move to payload phase if header length is null or
  4304. if the header length was less than 16 and header written by software instead of DMA */
  4305. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  4306. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  4307. /* Select payload phase once the header phase is performed */
  4308. CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
  4309. /* Initiate payload DMA IN and processed data DMA OUT transfers */
  4310. if (CRYP_GCMCCM_SetPayloadPhase_DMA(hcryp) != HAL_OK)
  4311. {
  4312. return HAL_ERROR;
  4313. }
  4314. } /* if (headersize_in_bytes >= 16U) */
  4315. /* Return function status */
  4316. return HAL_OK;
  4317. }
  4318. /**
  4319. * @brief Sets the header phase in interrupt mode
  4320. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4321. * the configuration information for CRYP module(Header & HeaderSize)
  4322. * @retval None
  4323. */
  4324. static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp)
  4325. {
  4326. uint32_t loopcounter;
  4327. uint32_t lastwordsize;
  4328. uint32_t npblb;
  4329. uint32_t mode;
  4330. uint32_t headersize_in_bytes;
  4331. uint32_t tmp;
  4332. static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
  4333. 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
  4334. 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
  4335. }; /* 8-bit data type */
  4336. if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
  4337. {
  4338. headersize_in_bytes = hcryp->Init.HeaderSize * 4U;
  4339. }
  4340. else
  4341. {
  4342. headersize_in_bytes = hcryp->Init.HeaderSize;
  4343. }
  4344. /***************************** Header phase *********************************/
  4345. /* Test whether or not the header phase is over.
  4346. If the test below is true, move to payload phase */
  4347. if (headersize_in_bytes <= ((uint32_t)(hcryp->CrypHeaderCount) * 4U))
  4348. {
  4349. /* Set the phase */
  4350. hcryp->Phase = CRYP_PHASE_PROCESS;
  4351. /* Select payload phase */
  4352. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_PAYLOAD);
  4353. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  4354. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  4355. if (hcryp->Init.Algorithm == CRYP_AES_CCM)
  4356. {
  4357. /* Increment CrypHeaderCount to pass in CRYP_GCMCCM_SetPayloadPhase_IT */
  4358. hcryp->CrypHeaderCount++;
  4359. }
  4360. /* Write the payload Input block in the IN FIFO */
  4361. if (hcryp->Size == 0U)
  4362. {
  4363. /* Disable interrupts */
  4364. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  4365. /* Change the CRYP state */
  4366. hcryp->State = HAL_CRYP_STATE_READY;
  4367. /* Process unlocked */
  4368. __HAL_UNLOCK(hcryp);
  4369. }
  4370. else if (hcryp->Size >= 16U)
  4371. {
  4372. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4373. hcryp->CrypInCount++;
  4374. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4375. hcryp->CrypInCount++;
  4376. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4377. hcryp->CrypInCount++;
  4378. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4379. hcryp->CrypInCount++;
  4380. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  4381. {
  4382. /* Call the input data transfer complete callback */
  4383. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  4384. /*Call registered Input complete callback*/
  4385. hcryp->InCpltCallback(hcryp);
  4386. #else
  4387. /*Call legacy weak Input complete callback*/
  4388. HAL_CRYP_InCpltCallback(hcryp);
  4389. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  4390. }
  4391. }
  4392. else /* Size < 4 words : first block is the last block*/
  4393. {
  4394. /* Compute the number of padding bytes in last block of payload */
  4395. npblb = 16U - ((uint32_t)hcryp->Size);
  4396. mode = hcryp->Instance->CR & AES_CR_MODE;
  4397. if (((mode == CRYP_OPERATINGMODE_ENCRYPT) && (hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC)) ||
  4398. ((mode == CRYP_OPERATINGMODE_DECRYPT) && (hcryp->Init.Algorithm == CRYP_AES_CCM)))
  4399. {
  4400. /* Specify the number of non-valid bytes using NPBLB register*/
  4401. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, npblb << 20U);
  4402. }
  4403. /* Number of valid words (lastwordsize) in last block */
  4404. if ((npblb % 4U) == 0U)
  4405. {
  4406. lastwordsize = (16U - npblb) / 4U;
  4407. }
  4408. else
  4409. {
  4410. lastwordsize = ((16U - npblb) / 4U) + 1U;
  4411. }
  4412. /* Last block optionally pad the data with zeros*/
  4413. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter++)
  4414. {
  4415. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4416. hcryp->CrypInCount++;
  4417. }
  4418. while (loopcounter < 4U)
  4419. {
  4420. /* Pad the data with zeros to have a complete block */
  4421. hcryp->Instance->DINR = 0x0U;
  4422. loopcounter++;
  4423. }
  4424. /* Call the input data transfer complete callback */
  4425. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  4426. /*Call registered Input complete callback*/
  4427. hcryp->InCpltCallback(hcryp);
  4428. #else
  4429. /*Call legacy weak Input complete callback*/
  4430. HAL_CRYP_InCpltCallback(hcryp);
  4431. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  4432. }
  4433. }
  4434. else if ((((headersize_in_bytes / 4U) - (hcryp->CrypHeaderCount)) >= 4U))
  4435. {
  4436. /* Can enter full 4 header words */
  4437. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  4438. /* If suspension flag has been raised, suspend processing
  4439. only if not already at the end of the header */
  4440. if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
  4441. {
  4442. /* Clear CCF Flag */
  4443. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4444. /* reset SuspendRequest */
  4445. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  4446. /* Disable Computation Complete Flag and Errors Interrupts */
  4447. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  4448. /* Change the CRYP state */
  4449. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  4450. /* Mark that the payload phase is suspended */
  4451. hcryp->Phase = CRYP_PHASE_HEADER_SUSPENDED;
  4452. /* Process Unlocked */
  4453. __HAL_UNLOCK(hcryp);
  4454. }
  4455. else
  4456. #endif /* USE_HAL_CRYP_SUSPEND_RESUME */
  4457. {
  4458. /* Write the input block in the IN FIFO */
  4459. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4460. hcryp->CrypHeaderCount++;
  4461. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4462. hcryp->CrypHeaderCount++;
  4463. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4464. hcryp->CrypHeaderCount++;
  4465. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4466. hcryp->CrypHeaderCount++;
  4467. }
  4468. }
  4469. else /* Write last header block (4 words), padded with zeros if needed */
  4470. {
  4471. for (loopcounter = 0U; (loopcounter < ((headersize_in_bytes / 4U) % 4U)); loopcounter++)
  4472. {
  4473. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4474. hcryp->CrypHeaderCount++ ;
  4475. }
  4476. /* If the header size is a multiple of words */
  4477. if ((headersize_in_bytes % 4U) == 0U)
  4478. {
  4479. /* Pad the data with zeros to have a complete block */
  4480. while (loopcounter < 4U)
  4481. {
  4482. hcryp->Instance->DINR = 0x0U;
  4483. loopcounter++;
  4484. hcryp->CrypHeaderCount++;
  4485. }
  4486. }
  4487. else
  4488. {
  4489. /* Enter last bytes, padded with zeros */
  4490. tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4491. tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)];
  4492. hcryp->Instance->DINR = tmp;
  4493. loopcounter++;
  4494. hcryp->CrypHeaderCount++;
  4495. /* Pad the data with zeros to have a complete block */
  4496. while (loopcounter < 4U)
  4497. {
  4498. hcryp->Instance->DINR = 0x0U;
  4499. loopcounter++;
  4500. hcryp->CrypHeaderCount++;
  4501. }
  4502. }
  4503. }
  4504. }
  4505. /**
  4506. * @brief Handle CRYP hardware block Timeout when waiting for CCF flag to be raised.
  4507. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4508. * the configuration information for CRYP module.
  4509. * @param Timeout Timeout duration.
  4510. * @note This function can only be used in thread mode.
  4511. * @retval HAL status
  4512. */
  4513. static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  4514. {
  4515. uint32_t tickstart;
  4516. /* Get timeout */
  4517. tickstart = HAL_GetTick();
  4518. while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
  4519. {
  4520. /* Check for the Timeout */
  4521. if (Timeout != HAL_MAX_DELAY)
  4522. {
  4523. if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  4524. {
  4525. return HAL_ERROR;
  4526. }
  4527. }
  4528. }
  4529. return HAL_OK;
  4530. }
  4531. /**
  4532. * @brief Wait for Computation Complete Flag (CCF) to raise then clear it.
  4533. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4534. * the configuration information for CRYP module.
  4535. * @param Timeout Timeout duration.
  4536. * @note This function can be used in thread or handler mode.
  4537. * @retval HAL status
  4538. */
  4539. static void CRYP_ClearCCFlagWhenHigh(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  4540. {
  4541. uint32_t count = Timeout;
  4542. do
  4543. {
  4544. count-- ;
  4545. if (count == 0U)
  4546. {
  4547. /* Disable the CRYP peripheral clock */
  4548. __HAL_CRYP_DISABLE(hcryp);
  4549. /* Change state */
  4550. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4551. /* Process unlocked */
  4552. __HAL_UNLOCK(hcryp);
  4553. hcryp->State = HAL_CRYP_STATE_READY;
  4554. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
  4555. /*Call registered error callback*/
  4556. hcryp->ErrorCallback(hcryp);
  4557. #else
  4558. /*Call legacy weak error callback*/
  4559. HAL_CRYP_ErrorCallback(hcryp);
  4560. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  4561. }
  4562. } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF));
  4563. /* Clear CCF flag */
  4564. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  4565. }
  4566. #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
  4567. /**
  4568. * @brief In case of message processing suspension, read the Initialization Vector.
  4569. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4570. * the configuration information for CRYP module.
  4571. * @param Output Pointer to the buffer containing the saved Initialization Vector.
  4572. * @note This value has to be stored for reuse by writing the AES_IVRx registers
  4573. * as soon as the suspended processing has to be resumed.
  4574. * @retval None
  4575. */
  4576. static void CRYP_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Output)
  4577. {
  4578. uint32_t outputaddr = (uint32_t)Output;
  4579. *(uint32_t *)(outputaddr) = hcryp->Instance->IVR3;
  4580. outputaddr += 4U;
  4581. *(uint32_t *)(outputaddr) = hcryp->Instance->IVR2;
  4582. outputaddr += 4U;
  4583. *(uint32_t *)(outputaddr) = hcryp->Instance->IVR1;
  4584. outputaddr += 4U;
  4585. *(uint32_t *)(outputaddr) = hcryp->Instance->IVR0;
  4586. }
  4587. /**
  4588. * @brief In case of message processing resumption, rewrite the Initialization
  4589. * Vector in the AES_IVRx registers.
  4590. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4591. * the configuration information for CRYP module.
  4592. * @param Input Pointer to the buffer containing the saved Initialization Vector to
  4593. * write back in the CRYP hardware block.
  4594. * @note AES must be disabled when reconfiguring the IV values.
  4595. * @retval None
  4596. */
  4597. static void CRYP_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Input)
  4598. {
  4599. uint32_t ivaddr = (uint32_t)Input;
  4600. hcryp->Instance->IVR3 = *(uint32_t *)(ivaddr);
  4601. ivaddr += 4U;
  4602. hcryp->Instance->IVR2 = *(uint32_t *)(ivaddr);
  4603. ivaddr += 4U;
  4604. hcryp->Instance->IVR1 = *(uint32_t *)(ivaddr);
  4605. ivaddr += 4U;
  4606. hcryp->Instance->IVR0 = *(uint32_t *)(ivaddr);
  4607. }
  4608. /**
  4609. * @brief In case of message GCM/GMAC/CCM processing suspension,
  4610. * read the Suspend Registers.
  4611. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4612. * the configuration information for CRYP module.
  4613. * @param Output Pointer to the buffer containing the saved Suspend Registers.
  4614. * @note These values have to be stored for reuse by writing back the AES_SUSPxR registers
  4615. * as soon as the suspended processing has to be resumed.
  4616. * @retval None
  4617. */
  4618. static void CRYP_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Output)
  4619. {
  4620. uint32_t outputaddr = (uint32_t)Output;
  4621. __IO uint32_t count = 0U;
  4622. /* In case of GCM payload phase encryption, check that suspension can be carried out */
  4623. if (READ_BIT(hcryp->Instance->CR,
  4624. (AES_CR_CHMOD | AES_CR_GCMPH | AES_CR_MODE)) == (CRYP_AES_GCM_GMAC | AES_CR_GCMPH_1 | 0x0U))
  4625. {
  4626. /* Wait for BUSY flag to be cleared */
  4627. count = 0xFFF;
  4628. do
  4629. {
  4630. count-- ;
  4631. if (count == 0U)
  4632. {
  4633. /* Change state */
  4634. hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
  4635. hcryp->State = HAL_CRYP_STATE_READY;
  4636. /* Process unlocked */
  4637. __HAL_UNLOCK(hcryp);
  4638. HAL_CRYP_ErrorCallback(hcryp);
  4639. return;
  4640. }
  4641. } while (HAL_IS_BIT_SET(hcryp->Instance->SR, AES_SR_BUSY));
  4642. }
  4643. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP7R;
  4644. outputaddr += 4U;
  4645. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP6R;
  4646. outputaddr += 4U;
  4647. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP5R;
  4648. outputaddr += 4U;
  4649. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP4R;
  4650. outputaddr += 4U;
  4651. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP3R;
  4652. outputaddr += 4U;
  4653. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP2R;
  4654. outputaddr += 4U;
  4655. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP1R;
  4656. outputaddr += 4U;
  4657. *(uint32_t *)(outputaddr) = hcryp->Instance->SUSP0R;
  4658. }
  4659. /**
  4660. * @brief In case of message GCM/GMAC/CCM processing resumption, rewrite the Suspend
  4661. * Registers in the AES_SUSPxR registers.
  4662. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4663. * the configuration information for CRYP module.
  4664. * @param Input Pointer to the buffer containing the saved suspend registers to
  4665. * write back in the CRYP hardware block.
  4666. * @note AES must be disabled when reconfiguring the suspend registers.
  4667. * @retval None
  4668. */
  4669. static void CRYP_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Input)
  4670. {
  4671. uint32_t ivaddr = (uint32_t)Input;
  4672. hcryp->Instance->SUSP7R = *(uint32_t *)(ivaddr);
  4673. ivaddr += 4U;
  4674. hcryp->Instance->SUSP6R = *(uint32_t *)(ivaddr);
  4675. ivaddr += 4U;
  4676. hcryp->Instance->SUSP5R = *(uint32_t *)(ivaddr);
  4677. ivaddr += 4U;
  4678. hcryp->Instance->SUSP4R = *(uint32_t *)(ivaddr);
  4679. ivaddr += 4U;
  4680. hcryp->Instance->SUSP3R = *(uint32_t *)(ivaddr);
  4681. ivaddr += 4U;
  4682. hcryp->Instance->SUSP2R = *(uint32_t *)(ivaddr);
  4683. ivaddr += 4U;
  4684. hcryp->Instance->SUSP1R = *(uint32_t *)(ivaddr);
  4685. ivaddr += 4U;
  4686. hcryp->Instance->SUSP0R = *(uint32_t *)(ivaddr);
  4687. }
  4688. /**
  4689. * @brief In case of message GCM/GMAC/CCM processing suspension, read the Key Registers.
  4690. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4691. * the configuration information for CRYP module.
  4692. * @param Output Pointer to the buffer containing the saved Key Registers.
  4693. * @param KeySize Indicates the key size (128 or 256 bits).
  4694. * @note These values have to be stored for reuse by writing back the AES_KEYRx registers
  4695. * as soon as the suspended processing has to be resumed.
  4696. * @retval None
  4697. */
  4698. static void CRYP_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Output, uint32_t KeySize)
  4699. {
  4700. uint32_t keyaddr = (uint32_t)Output;
  4701. switch (KeySize)
  4702. {
  4703. case CRYP_KEYSIZE_256B:
  4704. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey);
  4705. keyaddr += 4U;
  4706. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 1U);
  4707. keyaddr += 4U;
  4708. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 2U);
  4709. keyaddr += 4U;
  4710. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 3U);
  4711. keyaddr += 4U;
  4712. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 4U);
  4713. keyaddr += 4U;
  4714. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 5U);
  4715. keyaddr += 4U;
  4716. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 6U);
  4717. keyaddr += 4U;
  4718. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 7U);
  4719. break;
  4720. case CRYP_KEYSIZE_128B:
  4721. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey);
  4722. keyaddr += 4U;
  4723. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 1U);
  4724. keyaddr += 4U;
  4725. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 2U);
  4726. keyaddr += 4U;
  4727. *(uint32_t *)(keyaddr) = *(uint32_t *)(hcryp->Init.pKey + 3U);
  4728. break;
  4729. default:
  4730. break;
  4731. }
  4732. }
  4733. /**
  4734. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing resumption, rewrite the Key
  4735. * Registers in the AES_KEYRx registers.
  4736. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4737. * the configuration information for CRYP module.
  4738. * @param Input Pointer to the buffer containing the saved key registers to
  4739. * write back in the CRYP hardware block.
  4740. * @param KeySize Indicates the key size (128 or 256 bits)
  4741. * @note AES must be disabled when reconfiguring the Key registers.
  4742. * @retval None
  4743. */
  4744. static void CRYP_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint32_t *Input, uint32_t KeySize)
  4745. {
  4746. uint32_t keyaddr = (uint32_t)Input;
  4747. if (KeySize == CRYP_KEYSIZE_256B)
  4748. {
  4749. hcryp->Instance->KEYR7 = *(uint32_t *)(keyaddr);
  4750. keyaddr += 4U;
  4751. hcryp->Instance->KEYR6 = *(uint32_t *)(keyaddr);
  4752. keyaddr += 4U;
  4753. hcryp->Instance->KEYR5 = *(uint32_t *)(keyaddr);
  4754. keyaddr += 4U;
  4755. hcryp->Instance->KEYR4 = *(uint32_t *)(keyaddr);
  4756. keyaddr += 4U;
  4757. }
  4758. hcryp->Instance->KEYR3 = *(uint32_t *)(keyaddr);
  4759. keyaddr += 4U;
  4760. hcryp->Instance->KEYR2 = *(uint32_t *)(keyaddr);
  4761. keyaddr += 4U;
  4762. hcryp->Instance->KEYR1 = *(uint32_t *)(keyaddr);
  4763. keyaddr += 4U;
  4764. hcryp->Instance->KEYR0 = *(uint32_t *)(keyaddr);
  4765. }
  4766. /**
  4767. * @brief Authentication phase resumption in case of GCM/GMAC/CCM process in interrupt mode
  4768. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
  4769. * the configuration information for CRYP module(Header & HeaderSize)
  4770. * @retval None
  4771. */
  4772. static void CRYP_PhaseProcessingResume(CRYP_HandleTypeDef *hcryp)
  4773. {
  4774. uint32_t loopcounter;
  4775. uint16_t lastwordsize;
  4776. uint16_t npblb;
  4777. uint32_t cr_temp;
  4778. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_ERR_CLEAR | CRYP_CCF_CLEAR);
  4779. /* Enable computation complete flag and error interrupts */
  4780. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE);
  4781. /* Enable the CRYP peripheral */
  4782. __HAL_CRYP_ENABLE(hcryp);
  4783. /* Case of header phase resumption =================================================*/
  4784. if (hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED)
  4785. {
  4786. /* Set the phase */
  4787. hcryp->Phase = CRYP_PHASE_PROCESS;
  4788. /* Select header phase */
  4789. CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
  4790. if ((((hcryp->Init.HeaderSize) - (hcryp->CrypHeaderCount)) >= 4U))
  4791. {
  4792. /* Write the input block in the IN FIFO */
  4793. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4794. hcryp->CrypHeaderCount++;
  4795. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4796. hcryp->CrypHeaderCount++;
  4797. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4798. hcryp->CrypHeaderCount++;
  4799. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4800. hcryp->CrypHeaderCount++;
  4801. }
  4802. else /*HeaderSize < 4 or HeaderSize >4 & HeaderSize %4 != 0*/
  4803. {
  4804. /* Last block optionally pad the data with zeros*/
  4805. for (loopcounter = 0U; loopcounter < (hcryp->Init.HeaderSize % 4U); loopcounter++)
  4806. {
  4807. hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
  4808. hcryp->CrypHeaderCount++ ;
  4809. }
  4810. while (loopcounter < 4U)
  4811. {
  4812. /* pad the data with zeros to have a complete block */
  4813. hcryp->Instance->DINR = 0x0U;
  4814. loopcounter++;
  4815. }
  4816. }
  4817. }
  4818. /* Case of payload phase resumption =================================================*/
  4819. else
  4820. {
  4821. if (hcryp->Phase == CRYP_PHASE_PAYLOAD_SUSPENDED)
  4822. {
  4823. /* Set the phase */
  4824. hcryp->Phase = CRYP_PHASE_PROCESS;
  4825. /* Select payload phase once the header phase is performed */
  4826. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_PAYLOAD);
  4827. /* Set to 0 the number of non-valid bytes using NPBLB register*/
  4828. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, 0U);
  4829. if (((hcryp->Size / 4U) - (hcryp->CrypInCount)) >= 4U)
  4830. {
  4831. /* Write the input block in the IN FIFO */
  4832. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4833. hcryp->CrypInCount++;
  4834. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4835. hcryp->CrypInCount++;
  4836. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4837. hcryp->CrypInCount++;
  4838. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4839. hcryp->CrypInCount++;
  4840. if ((hcryp->CrypInCount == (hcryp->Size / 4U)) && ((hcryp->Size % 16U) == 0U))
  4841. {
  4842. /* Call input transfer complete callback */
  4843. #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1)
  4844. /*Call registered Input complete callback*/
  4845. hcryp->InCpltCallback(hcryp);
  4846. #else
  4847. /*Call legacy weak Input complete callback*/
  4848. HAL_CRYP_InCpltCallback(hcryp);
  4849. #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
  4850. }
  4851. }
  4852. else /* Last block of payload < 128bit*/
  4853. {
  4854. /* Compute the number of padding bytes in last block of payload */
  4855. npblb = (((hcryp->Size / 16U) + 1U) * 16U) - (hcryp->Size);
  4856. cr_temp = hcryp->Instance->CR;
  4857. if ((((cr_temp & AES_CR_MODE) == CRYP_OPERATINGMODE_ENCRYPT) && (hcryp->Init.Algorithm == CRYP_AES_GCM_GMAC)) ||
  4858. (((cr_temp & AES_CR_MODE) == CRYP_OPERATINGMODE_DECRYPT) && (hcryp->Init.Algorithm == CRYP_AES_CCM)))
  4859. {
  4860. /* Specify the number of non-valid bytes using NPBLB register*/
  4861. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, ((uint32_t)npblb) << 20U);
  4862. }
  4863. /* Number of valid words (lastwordsize) in last block */
  4864. if ((npblb % 4U) == 0U)
  4865. {
  4866. lastwordsize = (16U - npblb) / 4U;
  4867. }
  4868. else
  4869. {
  4870. lastwordsize = ((16U - npblb) / 4U) + 1U;
  4871. }
  4872. /* Last block optionally pad the data with zeros*/
  4873. for (loopcounter = 0U; loopcounter < lastwordsize; loopcounter++)
  4874. {
  4875. hcryp->Instance->DINR = *(uint32_t *)(hcryp->pCrypInBuffPtr + hcryp->CrypInCount);
  4876. hcryp->CrypInCount++;
  4877. }
  4878. while (loopcounter < 4U)
  4879. {
  4880. /* pad the data with zeros to have a complete block */
  4881. hcryp->Instance->DINR = 0x0U;
  4882. loopcounter++;
  4883. }
  4884. }
  4885. }
  4886. }
  4887. }
  4888. #endif /* defined (USE_HAL_CRYP_SUSPEND_RESUME) */
  4889. /**
  4890. * @}
  4891. */
  4892. #endif /* HAL_CRYP_MODULE_ENABLED */
  4893. #endif /* AES */
  4894. /**
  4895. * @}
  4896. */
  4897. /**
  4898. * @}
  4899. */