stm32g0xx_hal_pcd.h 23 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32g0xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2018 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32G0xx_HAL_PCD_H
  20. #define STM32G0xx_HAL_PCD_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32g0xx_ll_usb.h"
  26. #if defined (USB_DRD_FS)
  27. /** @addtogroup STM32G0xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup PCD
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup PCD_Exported_Types PCD Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief PCD State structure definition
  39. */
  40. typedef enum
  41. {
  42. HAL_PCD_STATE_RESET = 0x00,
  43. HAL_PCD_STATE_READY = 0x01,
  44. HAL_PCD_STATE_ERROR = 0x02,
  45. HAL_PCD_STATE_BUSY = 0x03,
  46. HAL_PCD_STATE_TIMEOUT = 0x04
  47. } PCD_StateTypeDef;
  48. /* Device LPM suspend state */
  49. typedef enum
  50. {
  51. LPM_L0 = 0x00, /* on */
  52. LPM_L1 = 0x01, /* LPM L1 sleep */
  53. LPM_L2 = 0x02, /* suspend */
  54. LPM_L3 = 0x03, /* off */
  55. } PCD_LPM_StateTypeDef;
  56. typedef enum
  57. {
  58. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  59. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  60. } PCD_LPM_MsgTypeDef;
  61. typedef enum
  62. {
  63. PCD_BCD_ERROR = 0xFF,
  64. PCD_BCD_CONTACT_DETECTION = 0xFE,
  65. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  66. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  67. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  68. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  69. } PCD_BCD_MsgTypeDef;
  70. typedef USB_DRD_TypeDef PCD_TypeDef;
  71. typedef USB_DRD_CfgTypeDef PCD_InitTypeDef;
  72. typedef USB_DRD_EPTypeDef PCD_EPTypeDef;
  73. /**
  74. * @brief PCD Handle Structure definition
  75. */
  76. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  77. typedef struct __PCD_HandleTypeDef
  78. #else
  79. typedef struct
  80. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  81. {
  82. PCD_TypeDef *Instance; /*!< Register base address */
  83. PCD_InitTypeDef Init; /*!< PCD required parameters */
  84. __IO uint8_t USB_Address; /*!< USB Address */
  85. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  86. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  87. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  88. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  89. __IO uint32_t ErrorCode; /*!< PCD Error code */
  90. uint32_t Setup[12]; /*!< Setup packet buffer */
  91. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  92. uint32_t BESL;
  93. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  94. This parameter can be set to ENABLE or DISABLE */
  95. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  96. This parameter can be set to ENABLE or DISABLE */
  97. void *pData; /*!< Pointer to upper stack Handler */
  98. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  99. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  100. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  101. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  102. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  103. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  104. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  105. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  106. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  107. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  108. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  109. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  110. void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
  111. void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
  112. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  113. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  114. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  115. } PCD_HandleTypeDef;
  116. /**
  117. * @}
  118. */
  119. /* Include PCD HAL Extended module */
  120. #include "stm32g0xx_hal_pcd_ex.h"
  121. /* Exported constants --------------------------------------------------------*/
  122. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  123. * @{
  124. */
  125. /** @defgroup PCD_Speed PCD Speed
  126. * @{
  127. */
  128. #define PCD_SPEED_FULL USBD_FS_SPEED
  129. /**
  130. * @}
  131. */
  132. /** @defgroup PCD_PHY_Module PCD PHY Module
  133. * @{
  134. */
  135. #define PCD_PHY_ULPI 1U
  136. #define PCD_PHY_EMBEDDED 2U
  137. #define PCD_PHY_UTMI 3U
  138. /**
  139. * @}
  140. */
  141. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  142. * @brief PCD Error Code definition
  143. * @{
  144. */
  145. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  146. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  147. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  148. /**
  149. * @}
  150. */
  151. /**
  152. * @}
  153. */
  154. /* Exported macros -----------------------------------------------------------*/
  155. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  156. * @brief macros to handle interrupts and specific clock configurations
  157. * @{
  158. */
  159. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  160. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  161. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
  162. ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  163. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
  164. &= (uint16_t)(~(__INTERRUPT__)))
  165. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR2 |= USB_WAKEUP_EXTI_LINE
  166. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR2 &= ~(USB_WAKEUP_EXTI_LINE)
  167. /**
  168. * @}
  169. */
  170. /* Exported functions --------------------------------------------------------*/
  171. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  172. * @{
  173. */
  174. /* Initialization/de-initialization functions ********************************/
  175. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  176. * @{
  177. */
  178. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  179. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  180. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  181. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  182. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  183. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  184. * @brief HAL USB OTG PCD Callback ID enumeration definition
  185. * @{
  186. */
  187. typedef enum
  188. {
  189. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  190. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  191. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  192. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  193. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  194. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  195. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  196. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  197. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  198. } HAL_PCD_CallbackIDTypeDef;
  199. /**
  200. * @}
  201. */
  202. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  203. * @brief HAL USB OTG PCD Callback pointer definition
  204. * @{
  205. */
  206. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  207. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  208. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  209. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  210. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  211. typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
  212. typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
  213. /**
  214. * @}
  215. */
  216. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
  217. pPCD_CallbackTypeDef pCallback);
  218. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  219. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  220. pPCD_DataOutStageCallbackTypeDef pCallback);
  221. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  222. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  223. pPCD_DataInStageCallbackTypeDef pCallback);
  224. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  225. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  226. pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  227. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  228. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  229. pPCD_IsoInIncpltCallbackTypeDef pCallback);
  230. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  231. HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
  232. HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
  233. HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
  234. HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
  235. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  236. /**
  237. * @}
  238. */
  239. /* I/O operation functions ***************************************************/
  240. /* Non-Blocking mode: Interrupt */
  241. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  242. * @{
  243. */
  244. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  245. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  246. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  247. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  249. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  250. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  251. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  252. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  253. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  254. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  255. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  256. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  257. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  258. /**
  259. * @}
  260. */
  261. /* Peripheral Control functions **********************************************/
  262. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  263. * @{
  264. */
  265. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  266. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  267. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  268. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  269. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  270. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  271. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  272. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  273. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  274. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  275. HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  276. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  277. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  278. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
  279. /**
  280. * @}
  281. */
  282. /* Peripheral State functions ************************************************/
  283. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  284. * @{
  285. */
  286. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
  287. /**
  288. * @}
  289. */
  290. /**
  291. * @}
  292. */
  293. /* Private constants ---------------------------------------------------------*/
  294. /** @defgroup PCD_Private_Constants PCD Private Constants
  295. * @{
  296. */
  297. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  298. * @{
  299. */
  300. #define USB_WAKEUP_EXTI_LINE (0x1U << 4) /*!< USB FS EXTI Line WakeUp Interrupt */
  301. /**
  302. * @}
  303. */
  304. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  305. * @{
  306. */
  307. #define PCD_EP0MPS_64 EP_MPS_64
  308. #define PCD_EP0MPS_32 EP_MPS_32
  309. #define PCD_EP0MPS_16 EP_MPS_16
  310. #define PCD_EP0MPS_08 EP_MPS_8
  311. /**
  312. * @}
  313. */
  314. /** @defgroup PCD_ENDP PCD ENDP
  315. * @{
  316. */
  317. #define PCD_ENDP0 0U
  318. #define PCD_ENDP1 1U
  319. #define PCD_ENDP2 2U
  320. #define PCD_ENDP3 3U
  321. #define PCD_ENDP4 4U
  322. #define PCD_ENDP5 5U
  323. #define PCD_ENDP6 6U
  324. #define PCD_ENDP7 7U
  325. /**
  326. * @}
  327. */
  328. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  329. * @{
  330. */
  331. #define PCD_SNG_BUF 0U
  332. #define PCD_DBL_BUF 1U
  333. /**
  334. * @}
  335. */
  336. /**
  337. * @}
  338. */
  339. /* Private macros ------------------------------------------------------------*/
  340. /** @defgroup PCD_Private_Macros PCD Private Macros
  341. * @{
  342. */
  343. /* PMA RX counter */
  344. #ifndef PCD_RX_PMA_CNT
  345. #define PCD_RX_PMA_CNT 10U
  346. #endif /* PCD_RX_PMA_CNT */
  347. /* SetENDPOINT */
  348. #define PCD_SET_ENDPOINT USB_DRD_SET_CHEP
  349. /* GetENDPOINT Register value*/
  350. #define PCD_GET_ENDPOINT USB_DRD_GET_CHEP
  351. /**
  352. * @brief free buffer used from the application realizing it to the line
  353. * toggles bit SW_BUF in the double buffered endpoint register
  354. * @param USBx USB device.
  355. * @param bEpNum, bDir
  356. * @retval None
  357. */
  358. #define PCD_FREE_USER_BUFFER USB_DRD_FREE_USER_BUFFER
  359. /**
  360. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  361. * @param USBx USB peripheral instance register address.
  362. * @param bEpNum Endpoint Number.
  363. * @param wState new state
  364. * @retval None
  365. */
  366. #define PCD_SET_EP_TX_STATUS USB_DRD_SET_CHEP_TX_STATUS
  367. /**
  368. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  369. * @param USBx USB peripheral instance register address.
  370. * @param bEpNum Endpoint Number.
  371. * @param wState new state
  372. * @retval None
  373. */
  374. #define PCD_SET_EP_RX_STATUS USB_DRD_SET_CHEP_RX_STATUS
  375. /**
  376. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  377. * @param USBx USB peripheral instance register address.
  378. * @param bEpNum Endpoint Number.
  379. * @retval None
  380. */
  381. #define PCD_SET_EP_KIND USB_DRD_SET_CHEP_KIND
  382. #define PCD_CLEAR_EP_KIND USB_DRD_CLEAR_CHEP_KIND
  383. #define PCD_SET_BULK_EP_DBUF PCD_SET_EP_KIND
  384. #define PCD_CLEAR_BULK_EP_DBUF PCD_CLEAR_EP_KIND
  385. /**
  386. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  387. * @param USBx USB peripheral instance register address.
  388. * @param bEpNum Endpoint Number.
  389. * @retval None
  390. */
  391. #define PCD_CLEAR_RX_EP_CTR USB_DRD_CLEAR_RX_CHEP_CTR
  392. #define PCD_CLEAR_TX_EP_CTR USB_DRD_CLEAR_TX_CHEP_CTR
  393. /**
  394. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  395. * @param USBx USB peripheral instance register address.
  396. * @param bEpNum Endpoint Number.
  397. * @retval None
  398. */
  399. #define PCD_RX_DTOG USB_DRD_RX_DTOG
  400. #define PCD_TX_DTOG USB_DRD_TX_DTOG
  401. /**
  402. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  403. * @param USBx USB peripheral instance register address.
  404. * @param bEpNum Endpoint Number.
  405. * @retval None
  406. */
  407. #define PCD_CLEAR_RX_DTOG USB_DRD_CLEAR_RX_DTOG
  408. #define PCD_CLEAR_TX_DTOG USB_DRD_CLEAR_TX_DTOG
  409. /**
  410. * @brief Sets address in an endpoint register.
  411. * @param USBx USB peripheral instance register address.
  412. * @param bEpNum Endpoint Number.
  413. * @param bAddr Address.
  414. * @retval None
  415. */
  416. #define PCD_SET_EP_ADDRESS USB_DRD_SET_CHEP_ADDRESS
  417. /**
  418. * @brief sets address of the tx/rx buffer.
  419. * @param USBx USB peripheral instance register address.
  420. * @param bEpNum Endpoint Number.
  421. * @param wAddr address to be set (must be word aligned).
  422. * @retval None
  423. */
  424. #define PCD_SET_EP_TX_ADDRESS USB_DRD_SET_CHEP_TX_ADDRESS
  425. #define PCD_SET_EP_RX_ADDRESS USB_DRD_SET_CHEP_RX_ADDRESS
  426. /**
  427. * @brief sets counter for the tx/rx buffer.
  428. * @param USBx USB peripheral instance register address.
  429. * @param bEpNum Endpoint Number.
  430. * @param wCount Counter value.
  431. * @retval None
  432. */
  433. #define PCD_SET_EP_TX_CNT USB_DRD_SET_CHEP_TX_CNT
  434. #define PCD_SET_EP_RX_CNT USB_DRD_SET_CHEP_RX_CNT
  435. /**
  436. * @brief gets counter of the tx buffer.
  437. * @param USBx USB peripheral instance register address.
  438. * @param bEpNum Endpoint Number.
  439. * @retval Counter value
  440. */
  441. #define PCD_GET_EP_TX_CNT USB_DRD_GET_CHEP_TX_CNT
  442. /**
  443. * @brief gets counter of the rx buffer.
  444. * @param Instance USB peripheral instance register address.
  445. * @param bEpNum channel Number.
  446. * @retval Counter value
  447. */
  448. __STATIC_INLINE uint16_t PCD_GET_EP_RX_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
  449. {
  450. UNUSED(Instance);
  451. __IO uint32_t count = PCD_RX_PMA_CNT;
  452. /* WA: few cycles for RX PMA descriptor to update */
  453. while (count > 0U)
  454. {
  455. count--;
  456. }
  457. return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bEpNum));
  458. }
  459. /**
  460. * @brief Sets addresses in a double buffer endpoint.
  461. * @param USBx USB peripheral instance register address.
  462. * @param bEpNum Endpoint Number.
  463. * @param wBuf0Addr: buffer 0 address.
  464. * @param wBuf1Addr = buffer 1 address.
  465. * @retval None
  466. */
  467. #define PCD_SET_EP_DBUF_ADDR USB_DRD_SET_CHEP_DBUF_ADDR
  468. /**
  469. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  470. * @param USBx USB peripheral instance register address.
  471. * @param bEpNum Endpoint Number.
  472. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  473. * EP_DBUF_IN = IN
  474. * @param wCount: Counter value
  475. * @retval None
  476. */
  477. #define PCD_SET_EP_DBUF0_CNT USB_DRD_SET_CHEP_DBUF0_CNT
  478. #define PCD_SET_EP_DBUF1_CNT USB_DRD_SET_CHEP_DBUF1_CNT
  479. #define PCD_SET_EP_DBUF_CNT USB_DRD_SET_CHEP_DBUF_CNT
  480. /**
  481. * @brief gets counter of the rx buffer0.
  482. * @param Instance USB peripheral instance register address.
  483. * @param bEpNum channel Number.
  484. * @retval Counter value
  485. */
  486. __STATIC_INLINE uint16_t PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
  487. {
  488. UNUSED(Instance);
  489. __IO uint32_t count = PCD_RX_PMA_CNT;
  490. /* WA: few cycles for RX PMA descriptor to update */
  491. while (count > 0U)
  492. {
  493. count--;
  494. }
  495. return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bEpNum));
  496. }
  497. /**
  498. * @brief gets counter of the rx buffer1.
  499. * @param Instance USB peripheral instance register address.
  500. * @param bEpNum channel Number.
  501. * @retval Counter value
  502. */
  503. __STATIC_INLINE uint16_t PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
  504. {
  505. UNUSED(Instance);
  506. __IO uint32_t count = PCD_RX_PMA_CNT;
  507. /* WA: few cycles for RX PMA descriptor to update */
  508. while (count > 0U)
  509. {
  510. count--;
  511. }
  512. return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bEpNum));
  513. }
  514. /**
  515. * @}
  516. */
  517. /**
  518. * @}
  519. */
  520. /**
  521. * @}
  522. */
  523. #endif /* defined (USB_DRD_FS) */
  524. #ifdef __cplusplus
  525. }
  526. #endif
  527. #endif /* STM32G0xx_HAL_PCD_H */