stm32g0xx_hal_hcd.h 20 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32g0xx_hal_hcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of HCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2018 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32G0xx_HAL_HCD_H
  20. #define STM32G0xx_HAL_HCD_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32g0xx_ll_usb.h"
  26. #if defined (USB_DRD_FS)
  27. /** @addtogroup STM32G0xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup HCD HCD
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup HCD_Exported_Types HCD Exported Types
  35. * @{
  36. */
  37. /** @defgroup HCD_Exported_Types_Group1 HCD State Structure definition
  38. * @{
  39. */
  40. typedef enum
  41. {
  42. HAL_HCD_STATE_RESET = 0x00,
  43. HAL_HCD_STATE_READY = 0x01,
  44. HAL_HCD_STATE_ERROR = 0x02,
  45. HAL_HCD_STATE_BUSY = 0x03,
  46. HAL_HCD_STATE_TIMEOUT = 0x04
  47. } HCD_StateTypeDef;
  48. typedef USB_DRD_TypeDef HCD_TypeDef;
  49. typedef USB_DRD_CfgTypeDef HCD_InitTypeDef;
  50. typedef USB_DRD_HCTypeDef HCD_HCTypeDef;
  51. typedef USB_DRD_URBStateTypeDef HCD_URBStateTypeDef;
  52. typedef USB_DRD_HCStateTypeDef HCD_HCStateTypeDef;
  53. typedef enum
  54. {
  55. HCD_HCD_STATE_DISCONNECTED = 0x00U,
  56. HCD_HCD_STATE_CONNECTED = 0x01U,
  57. HCD_HCD_STATE_RESETED = 0x02U,
  58. HCD_HCD_STATE_RUN = 0x03U,
  59. HCD_HCD_STATE_SUSPEND = 0x04U,
  60. HCD_HCD_STATE_RESUME = 0x05U,
  61. } HCD_HostStateTypeDef;
  62. /* PMA lookup Table size depending on PMA Size
  63. * 8Bytes each Block 32Bit in each word
  64. */
  65. #define PMA_BLOCKS ((USB_DRD_PMA_SIZE) / (8U * 32U))
  66. /**
  67. * @}
  68. */
  69. /** @defgroup HCD_Exported_Types_Group2 HCD Handle Structure definition
  70. * @{
  71. */
  72. #if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
  73. typedef struct __HCD_HandleTypeDef
  74. #else
  75. typedef struct
  76. #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
  77. {
  78. HCD_TypeDef *Instance; /*!< Register base address */
  79. HCD_InitTypeDef Init; /*!< HCD required parameters */
  80. HCD_HCTypeDef hc[16]; /*!< Host channels parameters */
  81. uint32_t ep0_PmaAllocState; /*!< EP0 PMA allocation State (allocated, virtual Ch, EP0 direction) */
  82. uint16_t phy_chin_state[8]; /*!< Physical Channel in State (Used/Free) */
  83. uint16_t phy_chout_state[8]; /*!< Physical Channel out State (Used/Free)*/
  84. uint32_t PMALookupTable[PMA_BLOCKS]; /*PMA LookUp Table */
  85. HCD_HostStateTypeDef HostState; /*!< USB current state DICONNECT/CONNECT/RUN/SUSPEND/RESUME */
  86. HAL_LockTypeDef Lock; /*!< HCD peripheral status */
  87. __IO HCD_StateTypeDef State; /*!< HCD communication state */
  88. __IO uint32_t ErrorCode; /*!< HCD Error code */
  89. void *pData; /*!< Pointer Stack Handler */
  90. #if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
  91. void (* SOFCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD SOF callback */
  92. void (* ConnectCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Connect callback */
  93. void (* DisconnectCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Disconnect callback */
  94. void (* PortEnabledCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Port Enable callback */
  95. void (* PortDisabledCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Port Disable callback */
  96. void (* HC_NotifyURBChangeCallback)(struct __HCD_HandleTypeDef *hhcd, uint8_t chnum,
  97. HCD_URBStateTypeDef urb_state); /*!< USB OTG HCD Host Channel Notify URB Change callback */
  98. void (* MspInitCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Msp Init callback */
  99. void (* MspDeInitCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Msp DeInit callback */
  100. #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
  101. } HCD_HandleTypeDef;
  102. /**
  103. * @}
  104. */
  105. /**
  106. * @}
  107. */
  108. /* Exported constants --------------------------------------------------------*/
  109. /** @defgroup HCD_Exported_Constants HCD Exported Constants
  110. * @{
  111. */
  112. /** @defgroup HCD_Speed HCD Speed
  113. * @{
  114. */
  115. #define HCD_SPEED_FULL USBH_FSLS_SPEED
  116. #define HCD_SPEED_LOW USBH_FSLS_SPEED
  117. /**
  118. * @}
  119. */
  120. /** @defgroup HCD_Device_Speed HCD Device Speed
  121. * @{
  122. */
  123. #define HCD_DEVICE_SPEED_HIGH 0U
  124. #define HCD_DEVICE_SPEED_FULL 1U
  125. #define HCD_DEVICE_SPEED_LOW 2U
  126. /**
  127. * @}
  128. */
  129. /** @defgroup HCD_PHY_Module HCD PHY Module
  130. * @{
  131. */
  132. #define HCD_PHY_ULPI 1U
  133. #define HCD_PHY_EMBEDDED 2U
  134. /**
  135. * @}
  136. */
  137. /** @defgroup HCD_Error_Code_definition HCD Error Code definition
  138. * @brief HCD Error Code definition
  139. * @{
  140. */
  141. #if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
  142. #define HAL_HCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  143. #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
  144. /**
  145. * @}
  146. */
  147. /**
  148. * @}
  149. */
  150. /* Exported macro ------------------------------------------------------------*/
  151. /** @defgroup HCD_Exported_Macros HCD Exported Macros
  152. * @brief macros to handle interrupts and specific clock configurations
  153. * @{
  154. */
  155. #define __HAL_HCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  156. #define __HAL_HCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  157. #define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\
  158. & (__INTERRUPT__)) == (__INTERRUPT__))
  159. #define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  160. #define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  161. #define __HAL_HCD_GET_CHNUM(__HANDLE__) (((__HANDLE__)->Instance->ISTR) & USB_ISTR_IDN)
  162. #define __HAL_HCD_GET_CHDIR(__HANDLE__) (((__HANDLE__)->Instance->ISTR) & USB_ISTR_DIR)
  163. /**
  164. * @}
  165. */
  166. /* Exported functions --------------------------------------------------------*/
  167. /** @addtogroup HCD_Exported_Functions HCD Exported Functions
  168. * @{
  169. */
  170. /** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
  171. * @{
  172. */
  173. HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
  174. HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
  175. HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
  176. uint8_t epnum, uint8_t dev_address,
  177. uint8_t speed, uint8_t ep_type, uint16_t mps);
  178. HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
  179. HAL_StatusTypeDef HAL_HCD_HC_Close(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
  180. void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
  181. void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
  182. #if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
  183. /** @defgroup HAL_HCD_Callback_ID_enumeration_definition HAL USB OTG HCD Callback ID enumeration definition
  184. * @brief HAL USB OTG HCD Callback ID enumeration definition
  185. * @{
  186. */
  187. typedef enum
  188. {
  189. HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
  190. HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
  191. HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
  192. HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
  193. HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
  194. HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
  195. HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
  196. } HAL_HCD_CallbackIDTypeDef;
  197. /**
  198. * @}
  199. */
  200. /** @defgroup HAL_HCD_Callback_pointer_definition HAL USB OTG HCD Callback pointer definition
  201. * @brief HAL USB OTG HCD Callback pointer definition
  202. * @{
  203. */
  204. typedef void (*pHCD_CallbackTypeDef)(HCD_HandleTypeDef *hhcd); /*!< pointer to a common USB OTG HCD callback function */
  205. typedef void (*pHCD_HC_NotifyURBChangeCallbackTypeDef)(HCD_HandleTypeDef *hhcd,
  206. uint8_t epnum,
  207. HCD_URBStateTypeDef urb_state); /*!< pointer to USB OTG HCD host channel callback */
  208. /**
  209. * @}
  210. */
  211. HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
  212. HAL_HCD_CallbackIDTypeDef CallbackID,
  213. pHCD_CallbackTypeDef pCallback);
  214. HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd,
  215. HAL_HCD_CallbackIDTypeDef CallbackID);
  216. HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
  217. pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
  218. HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd);
  219. #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
  220. /**
  221. * @}
  222. */
  223. /* I/O operation functions ***************************************************/
  224. /** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions
  225. * @{
  226. */
  227. HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
  228. uint8_t direction, uint8_t ep_type,
  229. uint8_t token, uint8_t *pbuff,
  230. uint16_t length, uint8_t do_ping);
  231. HAL_StatusTypeDef HAL_HCD_HC_SetHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
  232. uint8_t addr, uint8_t PortNbr);
  233. HAL_StatusTypeDef HAL_HCD_HC_ClearHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
  234. /* Non-Blocking mode: Interrupt */
  235. void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
  236. void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
  237. void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
  238. void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
  239. void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
  240. void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
  241. void HAL_HCD_SuspendCallback(HCD_HandleTypeDef *hhcd);
  242. void HAL_HCD_ResumeCallback(HCD_HandleTypeDef *hhcd);
  243. void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum,
  244. HCD_URBStateTypeDef urb_state);
  245. /**
  246. * @}
  247. */
  248. /* Peripheral Control functions **********************************************/
  249. /** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
  250. * @{
  251. */
  252. HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
  253. HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
  254. HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
  255. HAL_StatusTypeDef HAL_HCD_Suspend(HCD_HandleTypeDef *hhcd);
  256. HAL_StatusTypeDef HAL_HCD_Resume(HCD_HandleTypeDef *hhcd);
  257. HAL_StatusTypeDef HAL_HCD_ResumePort(HCD_HandleTypeDef *hhcd);
  258. /**
  259. * @}
  260. */
  261. /* Peripheral State functions ************************************************/
  262. /** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
  263. * @{
  264. */
  265. HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef const *hhcd);
  266. HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef const *hhcd, uint8_t chnum);
  267. HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef const *hhcd, uint8_t chnum);
  268. uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef const *hhcd, uint8_t chnum);
  269. uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
  270. uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
  271. /* PMA Allocation functions **********************************************/
  272. /** @addtogroup PMA Allocation
  273. * @{
  274. */
  275. HAL_StatusTypeDef HAL_HCD_PMAlloc(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
  276. uint16_t ch_kind, uint16_t mps);
  277. HAL_StatusTypeDef HAL_HCD_PMADeAlloc(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
  278. HAL_StatusTypeDef HAL_HCD_PMAReset(HCD_HandleTypeDef *hhcd);
  279. /**
  280. * @}
  281. */
  282. /**
  283. * @}
  284. */
  285. /* Private macros ------------------------------------------------------------*/
  286. /** @defgroup HCD_Private_Macros HCD Private Macros
  287. * @{
  288. */
  289. #define HCD_MIN(a, b) (((a) < (b)) ? (a) : (b))
  290. #define HCD_MAX(a, b) (((a) > (b)) ? (a) : (b))
  291. /** @defgroup HCD_LOGICAL_CHANNEL HCD Logical Channel
  292. * @{
  293. */
  294. #define HCD_LOGICAL_CH_NOT_OPENED 0xFFU
  295. #define HCD_FREE_CH_NOT_FOUND 0xFFU
  296. /**
  297. * @}
  298. */
  299. /** @defgroup HCD_ENDP_Kind HCD Endpoint Kind
  300. * @{
  301. */
  302. #define HCD_SNG_BUF 0U
  303. #define HCD_DBL_BUF 1U
  304. /**
  305. * @}
  306. */
  307. /* Set Channel */
  308. #define HCD_SET_CHANNEL USB_DRD_SET_CHEP
  309. /* Get Channel Register */
  310. #define HCD_GET_CHANNEL USB_DRD_GET_CHEP
  311. /**
  312. * @brief free buffer used from the application realizing it to the line
  313. * toggles bit SW_BUF in the double buffered endpoint register
  314. * @param USBx USB device.
  315. * @param bChNum, bDir
  316. * @retval None
  317. */
  318. #define HCD_FREE_USER_BUFFER USB_DRD_FREE_USER_BUFFER
  319. /**
  320. * @brief Set the Setup bit in the corresponding channel, when a Setup
  321. transaction is needed.
  322. * @param USBx USB device.
  323. * @param bChNum
  324. * @retval None
  325. */
  326. #define HAC_SET_CH_TX_SETUP USB_DRD_CHEP_TX_SETUP
  327. /**
  328. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  329. * @param USBx USB peripheral instance register address.
  330. * @param bChNum Endpoint Number.
  331. * @param wState new state
  332. * @retval None
  333. */
  334. #define HCD_SET_CH_TX_STATUS USB_DRD_SET_CHEP_TX_STATUS
  335. /**
  336. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  337. * @param USBx USB peripheral instance register address.
  338. * @param bChNum Endpoint Number.
  339. * @param wState new state
  340. * @retval None
  341. */
  342. #define HCD_SET_CH_RX_STATUS USB_DRD_SET_CHEP_RX_STATUS
  343. /**
  344. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  345. * /STAT_RX[1:0])
  346. * @param USBx USB peripheral instance register address.
  347. * @param bChNum Endpoint Number.
  348. * @retval status
  349. */
  350. #define HCD_GET_CH_TX_STATUS USB_DRD_GET_CHEP_TX_STATUS
  351. #define HCD_GET_CH_RX_STATUS USB_DRD_GET_CHEP_RX_STATUS
  352. /**
  353. * @brief Sets/clears CH_KIND bit in the Channel register.
  354. * @param USBx USB peripheral instance register address.
  355. * @param bChNum Endpoint Number.
  356. * @retval None
  357. */
  358. #define HCD_SET_CH_KIND USB_DRD_SET_CH_KIND
  359. #define HCD_CLEAR_CH_KIND USB_DRD_CLEAR_CH_KIND
  360. #define HCD_SET_BULK_CH_DBUF HCD_SET_CH_KIND
  361. #define HCD_CLEAR_BULK_CH_DBUF HCD_CLEAR_CH_KIND
  362. /**
  363. * @brief Clears bit ERR_RX in the Channel register
  364. * @param USBx USB peripheral instance register address.
  365. * @param bChNum Endpoint Number.
  366. * @retval None
  367. */
  368. #define HCD_CLEAR_RX_CH_ERR USB_DRD_CLEAR_CHEP_RX_ERR
  369. /**
  370. * @brief Clears bit ERR_TX in the Channel register
  371. * @param USBx USB peripheral instance register address.
  372. * @param bChNum Endpoint Number.
  373. * @retval None
  374. */
  375. #define HCD_CLEAR_TX_CH_ERR USB_DRD_CLEAR_CHEP_TX_ERR
  376. /**
  377. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  378. * @param USBx USB peripheral instance register address.
  379. * @param bChNum Endpoint Number.
  380. * @retval None
  381. */
  382. #define HCD_CLEAR_RX_CH_CTR USB_DRD_CLEAR_RX_CHEP_CTR
  383. #define HCD_CLEAR_TX_CH_CTR USB_DRD_CLEAR_TX_CHEP_CTR
  384. /**
  385. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  386. * @param USBx USB peripheral instance register address.
  387. * @param bChNum Endpoint Number.
  388. * @retval None
  389. */
  390. #define HCD_RX_DTOG USB_DRD_RX_DTOG
  391. #define HCD_TX_DTOG USB_DRD_TX_DTOG
  392. /**
  393. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  394. * @param USBx USB peripheral instance register address.
  395. * @param bChNum Endpoint Number.
  396. * @retval None
  397. */
  398. #define HCD_CLEAR_RX_DTOG USB_DRD_CLEAR_RX_DTOG
  399. #define HCD_CLEAR_TX_DTOG USB_DRD_CLEAR_TX_DTOG
  400. /**
  401. * @brief sets counter for the tx/rx buffer.
  402. * @param USBx USB peripheral instance register address.
  403. * @param bChNum Endpoint Number.
  404. * @param wCount Counter value.
  405. * @retval None
  406. */
  407. #define HCD_SET_CH_TX_CNT USB_DRD_SET_CHEP_TX_CNT
  408. #define HCD_SET_CH_RX_CNT USB_DRD_SET_CHEP_RX_CNT
  409. /**
  410. * @brief gets counter of the tx buffer.
  411. * @param USBx USB peripheral instance register address.
  412. * @param bChNum channel Number.
  413. * @retval Counter value
  414. */
  415. #define HCD_GET_CH_TX_CNT USB_DRD_GET_CHEP_TX_CNT
  416. /**
  417. * @brief gets counter of the rx buffer.
  418. * @param Instance USB peripheral instance register address.
  419. * @param bChNum channel Number.
  420. * @retval Counter value
  421. */
  422. __STATIC_INLINE uint16_t HCD_GET_CH_RX_CNT(HCD_TypeDef *Instance, uint16_t bChNum)
  423. {
  424. uint32_t HostCoreSpeed;
  425. __IO uint32_t count = 10U;
  426. /* Get Host core Speed */
  427. HostCoreSpeed = USB_GetHostSpeed(Instance);
  428. /* Count depends on device LS */
  429. if (HostCoreSpeed == USB_DRD_SPEED_LS)
  430. {
  431. count = (70U * (HAL_RCC_GetHCLKFreq() / 1000000U)) / 100U;
  432. }
  433. if (count > 15U)
  434. {
  435. count = HCD_MAX(10U, (count - 15U));
  436. }
  437. /* WA: few cycles for RX PMA descriptor to update */
  438. while (count > 0U)
  439. {
  440. count--;
  441. }
  442. return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bChNum));
  443. }
  444. /**
  445. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  446. * @param USBx USB peripheral instance register address.
  447. * @param bChNum Endpoint Number.
  448. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  449. * EP_DBUF_IN = IN
  450. * @param wCount: Counter value
  451. * @retval None
  452. */
  453. #define HCD_SET_CH_DBUF0_CNT USB_DRD_SET_CHEP_DBUF0_CNT
  454. #define HCD_SET_CH_DBUF1_CNT USB_DRD_SET_CHEP_DBUF1_CNT
  455. #define HCD_SET_CH_DBUF_CNT USB_DRD_SET_CHEP_DBUF_CNT
  456. /**
  457. * @brief gets counter of the rx buffer0.
  458. * @param Instance USB peripheral instance register address.
  459. * @param bChNum channel Number.
  460. * @retval Counter value
  461. */
  462. __STATIC_INLINE uint16_t HCD_GET_CH_DBUF0_CNT(const HCD_TypeDef *Instance, uint16_t bChNum)
  463. {
  464. UNUSED(Instance);
  465. __IO uint32_t count = 10U;
  466. /* WA: few cycles for RX PMA descriptor to update */
  467. while (count > 0U)
  468. {
  469. count--;
  470. }
  471. return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bChNum));
  472. }
  473. /**
  474. * @brief gets counter of the rx buffer1.
  475. * @param Instance USB peripheral instance register address.
  476. * @param bChNum channel Number.
  477. * @retval Counter value
  478. */
  479. __STATIC_INLINE uint16_t HCD_GET_CH_DBUF1_CNT(const HCD_TypeDef *Instance, uint16_t bChNum)
  480. {
  481. UNUSED(Instance);
  482. __IO uint32_t count = 10U;
  483. /* WA: few cycles for RX PMA descriptor to update */
  484. while (count > 0U)
  485. {
  486. count--;
  487. }
  488. return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bChNum));
  489. }
  490. /**
  491. * @}
  492. */
  493. /* Private functions prototypes ----------------------------------------------*/
  494. /**
  495. * @}
  496. */
  497. /**
  498. * @}
  499. */
  500. /**
  501. * @}
  502. */
  503. #endif /* defined (USB_DRD_FS) */
  504. #ifdef __cplusplus
  505. }
  506. #endif
  507. #endif /* STM32G0xx_HAL_HCD_H */