OLED_SSD1327.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347
  1. /*
  2. * OLED_SSD1327.c
  3. *
  4. * The MIT License.
  5. * Created on: 16.07.2020
  6. * Author: Mateusz Salamon
  7. * www.msalamon.pl
  8. * mateusz@msalamon.pl
  9. */
  10. #include "main.h"
  11. #include "OLED_SSD1327.h"
  12. #include "string.h"
  13. #ifdef SSD1327_I2C_CONTROL
  14. I2C_HandleTypeDef *ssd1337_i2c;
  15. #endif
  16. #ifdef SSD1327_SPI_CONTROL
  17. SPI_HandleTypeDef *ssd1337_spi;
  18. #endif
  19. #define SSD1327_BUFFERSIZE (SSD1327_LCDHEIGHT * SSD1327_LCDWIDTH / 2)
  20. static uint8_t buffer[SSD1327_BUFFERSIZE];
  21. void SSD1327_Command(uint8_t com)
  22. {
  23. #ifdef SSD1327_I2C_CONTROL
  24. // I2C
  25. HAL_I2C_Mem_Write(ssd1337_i2c, SSD1327_I2C_ADDRESS, 0x00, 1, &com, sizeof(com), 100);
  26. #endif
  27. #ifdef SSD1327_SPI_CONTROL
  28. //SPI
  29. HAL_GPIO_WritePin(SSD1327_DC_GPIO_Port, SSD1327_DC_Pin, GPIO_PIN_RESET);
  30. #ifndef SPI_CS_HARDWARE_CONTROL
  31. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_RESET);
  32. #endif
  33. HAL_SPI_Transmit(ssd1337_spi, &com, 1, 10);
  34. #ifndef SPI_CS_HARDWARE_CONTROL
  35. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_SET);
  36. #endif
  37. #endif
  38. }
  39. void SSD1327_Data(uint8_t dat)
  40. {
  41. #ifdef SSD1327_I2C_CONTROL
  42. // I2C
  43. HAL_I2C_Mem_Write(ssd1337_i2c, SSD1327_I2C_ADDRESS, 0x40, 1, &dat, sizeof(dat), 100);
  44. #endif
  45. #ifdef SSD1327_SPI_CONTROL
  46. // SPI
  47. HAL_GPIO_WritePin(SSD1327_DC_GPIO_Port, SSD1327_DC_Pin, GPIO_PIN_SET);
  48. #ifndef SPI_CS_HARDWARE_CONTROL
  49. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_RESET);
  50. #endif
  51. HAL_SPI_Transmit(ssd1337_spi, &dat, 1, 10);
  52. #ifndef SPI_CS_HARDWARE_CONTROL
  53. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_SET);
  54. #endif
  55. #endif
  56. }
  57. #if defined(SSD1327_SPI_CONTROL) || defined(SSD1327_RESET_USE)
  58. void SSD1327_Reset(void)
  59. {
  60. HAL_GPIO_WritePin(SSD1327_RESET_GPIO_Port, SSD1327_RESET_Pin, GPIO_PIN_RESET);
  61. HAL_Delay(5);
  62. HAL_GPIO_WritePin(SSD1327_RESET_GPIO_Port, SSD1327_RESET_Pin, GPIO_PIN_SET);
  63. }
  64. #endif
  65. //
  66. // Configuration functions
  67. //
  68. void SSD1327_InvertColors(uint8_t Invert)
  69. {
  70. SSD1327_Command(Invert ? SSD1327_INVERTDISPLAY : SSD1327_NORMALDISPLAY);
  71. }
  72. void SSD1327_RotateDisplay(uint8_t Rotate)
  73. {
  74. if(Rotate > 1) Rotate = 1;
  75. SSD1327_Command(0xA0 | (0x01 & Rotate)); // Set Segment Re-Map Default
  76. // 0xA0 (0x00) => column Address 0 mapped to 127
  77. // 0xA1 (0x01) => Column Address 127 mapped to 0
  78. SSD1327_Command(0xC0 | (0x08 & (Rotate<<3))); // Set COM Output Scan Direction
  79. // 0xC0 (0x00) => normal mode (RESET) Scan from COM0 to COM[N-1];Where N is the Multiplex ratio.
  80. // 0xC8 (0xC8) => remapped mode. Scan from COM[N-1] to COM0;;Where N is the Multiplex ratio.
  81. }
  82. void SSD1327_DisplayON(uint8_t On)
  83. {
  84. SSD1327_Command(On ? SSD1327_DISPLAYON : SSD1327_DISPLAYOFF);
  85. }
  86. void SSD1327_SetContrast(uint8_t Contrast)
  87. {
  88. SSD1327_Command(SSD1327_SETCONTRASTCURRENT); // Set Contrast Control
  89. SSD1327_Command(Contrast);
  90. }
  91. #if GRAPHIC_ACCELERATION_COMMANDS == 1
  92. //
  93. // Graphic Acceleration Command
  94. //
  95. void SSD1327_StartScrollRight(uint8_t StartPage, uint8_t EndPage, uint8_t Speed)
  96. {
  97. SSD1327_Command(SSD1327_RIGHT_HORIZONTAL_SCROLL);
  98. SSD1327_Command(0x00);
  99. SSD1327_Command(StartPage);
  100. SSD1327_Command(Speed);
  101. SSD1327_Command(EndPage);
  102. SSD1327_Command(SSD1327_ACTIVATE_SCROLL);
  103. }
  104. void SSD1327_StartScrollLeft(uint8_t StartPage, uint8_t EndPage, uint8_t Speed)
  105. {
  106. SSD1327_Command(SSD1327_LEFT_HORIZONTAL_SCROLL);
  107. SSD1327_Command(0x00);
  108. SSD1327_Command(StartPage);
  109. SSD1327_Command(Speed);
  110. SSD1327_Command(EndPage);
  111. SSD1327_Command(SSD1327_ACTIVATE_SCROLL);
  112. }
  113. void SSD1327_StopScroll(void)
  114. {
  115. SSD1327_Command(SSD1327_DEACTIVATE_SCROLL);
  116. }
  117. #endif
  118. //
  119. // Initialization
  120. //
  121. void SSD1327_Init(void)
  122. {
  123. SSD1327_Command(SSD1327_DISPLAYOFF); // Display Off
  124. SSD1327_Command(SSD1327_SETMULTIPLEX);
  125. SSD1327_Command(0x7F);
  126. SSD1327_Command(SSD1327_SETDISPLAYSTARTLINE);
  127. SSD1327_Command(0x00);
  128. SSD1327_Command(SSD1327_SETDISPLAYOFFSET);
  129. SSD1327_Command(0x0);
  130. SSD1327_Command(SSD1327_SEGREMAP);
  131. SSD1327_Command(0x51);
  132. SSD1327_SetContrast(0x7F);
  133. SSD1327_Command(SSD1327_SETPHASELENGTH);
  134. SSD1327_Command(0x22);
  135. SSD1327_Command(SSD1327_SETFRONTCLOCKDIVIDER_OSCILLATORFREQUENCY);
  136. SSD1327_Command(0x50);
  137. SSD1327_Command(SSD1327_SELECTDEFAULTLINEARGRAYSCALETABLE);
  138. SSD1327_Command(SSD1327_SETPRECHARGEVOLTAGE);
  139. SSD1327_Command(0x10);
  140. SSD1327_Command(SSD1327_SETSETVCOMVOLTAGE);
  141. SSD1327_Command(0x05);
  142. SSD1327_Command(SSD1327_SETSECONDPRECHARGEPERTIOD);
  143. SSD1327_Command(0x0a);
  144. SSD1327_Command(SSD1327_FUNCTIONSELECTIONB);
  145. SSD1327_Command(0x62);
  146. SSD1327_Command(SSD1327_SETCOLUMNADDRESS);
  147. SSD1327_Command(0x00);
  148. SSD1327_Command(0x3F);
  149. SSD1327_Command(SSD1327_SETROWADDRESS);
  150. SSD1327_Command(0x00);
  151. SSD1327_Command(0x7F);
  152. SSD1327_Command(SSD1327_NORMALDISPLAY); // Set Normal Display
  153. SSD1327_Command(SSD1327_DISPLAYALLON_RESUME); // Entire Display ON
  154. #if GRAPHIC_ACCELERATION_COMMANDS == 1
  155. SSD1327_StopScroll();
  156. #endif
  157. SSD1327_DisplayON(1);
  158. }
  159. #ifdef SSD1327_I2C_CONTROL
  160. void SSD1327_I2cInit(I2C_HandleTypeDef *i2c)
  161. {
  162. ssd1337_i2c = i2c;
  163. SSD1327_Init();
  164. }
  165. #endif
  166. #ifdef SSD1327_SPI_CONTROL
  167. void SSD1327_SpiInit(SPI_HandleTypeDef *spi)
  168. {
  169. ssd1337_spi = spi;
  170. #if defined(SSD1327_RESET_USE)
  171. SSD1327_Reset();
  172. #endif
  173. SSD1327_Init();
  174. }
  175. #endif
  176. //
  177. // Draw pixel in the buffer
  178. //
  179. void SSD1327_DrawPixel(int16_t x, int16_t y, uint8_t Color)
  180. {
  181. if ((x < 0) || (x >= SSD1327_LCDWIDTH) || (y < 0) || (y >= SSD1327_LCDHEIGHT))
  182. return;
  183. uint8_t SelectedCell = buffer[x/2 + y*(SSD1327_LCDWIDTH/2)];
  184. if(x % 2)
  185. {
  186. SelectedCell &= ~(0x0F);
  187. SelectedCell |= (0x0F & Color);
  188. }
  189. else
  190. {
  191. SelectedCell &= ~(0xF0);
  192. SelectedCell |= (0xF0 & (Color<<4));
  193. }
  194. buffer[x/2 + y*(SSD1327_LCDWIDTH/2)] = SelectedCell;
  195. }
  196. //
  197. // Clear the buffer
  198. //
  199. void SSD1327_Clear(uint8_t Color)
  200. {
  201. if(Color > WHITE) Color = WHITE;
  202. memset(buffer, (Color << 4 | Color), SSD1327_BUFFERSIZE);
  203. }
  204. //
  205. // Send buffer to OLDE GCRAM
  206. //
  207. void SSD1327_Display(void)
  208. {
  209. SSD1327_Command(SSD1327_SETCOLUMNADDRESS);
  210. SSD1327_Command(0x00);
  211. SSD1327_Command(0x3F);
  212. SSD1327_Command(SSD1327_SETROWADDRESS);
  213. SSD1327_Command(0x00);
  214. //SSD1327_Command(0x5F);
  215. SSD1327_Command(0x7F);
  216. #ifdef SSD1327_I2C_CONTROL
  217. #ifdef SSD1327_I2C_DMA_ENABLE
  218. if(ssd1337_i2c->hdmatx->State == HAL_DMA_STATE_READY)
  219. {
  220. HAL_I2C_Mem_Write_DMA(ssd1337_i2c, SSD1327_I2C_ADDRESS, 0x40, 1, (uint8_t*)&buffer, SSD1327_BUFFERSIZE);
  221. }
  222. #else
  223. HAL_I2C_Mem_Write(ssd1337_i2c, SSD1327_I2C_ADDRESS, 0x40, 1, (uint8_t*)&buffer, SSD1327_BUFFERSIZE, 1000);
  224. #endif
  225. #endif
  226. #ifdef SSD1327_SPI_CONTROL
  227. #ifdef SSD1327_SPI_DMA_ENABLE
  228. HAL_GPIO_WritePin(SSD1327_DC_GPIO_Port, SSD1327_DC_Pin, GPIO_PIN_SET);
  229. #ifndef SPI_CS_HARDWARE_CONTROL
  230. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_RESET);
  231. #endif
  232. if(ssd1337_spi->hdmatx->State == HAL_DMA_STATE_READY)
  233. {
  234. HAL_SPI_Transmit_DMA(ssd1337_spi, (uint8_t*)&buffer, SSD1327_BUFFERSIZE);
  235. }
  236. #else
  237. HAL_GPIO_WritePin(SSD1327_DC_GPIO_Port, SSD1327_DC_Pin, GPIO_PIN_SET);
  238. #ifndef SPI_CS_HARDWARE_CONTROL
  239. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_RESET);
  240. #endif
  241. HAL_SPI_Transmit(ssd1337_spi, (uint8_t*)&buffer, SSD1327_BUFFERSIZE, 100);
  242. #ifndef SPI_CS_HARDWARE_CONTROL
  243. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_SET);
  244. #endif
  245. #endif
  246. #endif
  247. }
  248. //
  249. // Display Bitmap directly on screen
  250. //
  251. void SSD1327_Bitmap(uint8_t *bitmap)
  252. {
  253. SSD1327_Command(0x22);
  254. SSD1327_Command(0x00);
  255. SSD1327_Command(0x07);
  256. #ifdef SSD1327_I2C_CONTROL
  257. #ifdef SSD1327_I2C_DMA_ENABLE
  258. if(ssd1337_i2c->hdmatx->State == HAL_DMA_STATE_READY)
  259. {
  260. HAL_I2C_Mem_Write_DMA(ssd1337_i2c, SSD1327_I2C_ADDRESS, 0x40, 1, bitmap, (SSD1327_LCDHEIGHT * SSD1327_LCDWIDTH / 8));
  261. }
  262. #else
  263. HAL_I2C_Mem_Write(ssd1337_i2c, SSD1327_I2C_ADDRESS, 0x40, 1, bitmap, (SSD1327_LCDHEIGHT * SSD1327_LCDWIDTH / 8), 100);
  264. #endif
  265. #endif
  266. #ifdef SSD1327_SPI_CONTROL
  267. #ifdef SSD1327_SPI_DMA_ENABLE
  268. HAL_GPIO_WritePin(SSD1327_DC_GPIO_Port, SSD1327_DC_Pin, GPIO_PIN_SET);
  269. #ifndef SPI_CS_HARDWARE_CONTROL
  270. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_RESET);
  271. #endif
  272. if(ssd1337_spi->hdmatx->State == HAL_DMA_STATE_READY)
  273. {
  274. HAL_SPI_Transmit_DMA(ssd1337_spi, bitmap, (SSD1327_LCDHEIGHT * SSD1327_LCDWIDTH / 8));
  275. }
  276. #else
  277. HAL_GPIO_WritePin(SSD1327_DC_GPIO_Port, SSD1327_DC_Pin, GPIO_PIN_SET);
  278. #ifndef SPI_CS_HARDWARE_CONTROL
  279. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_RESET);
  280. #endif
  281. HAL_SPI_Transmit(ssd1337_spi, bitmap, (SSD1327_LCDHEIGHT * SSD1327_LCDWIDTH / 8), 100);
  282. #ifndef SPI_CS_HARDWARE_CONTROL
  283. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_SET);
  284. #endif
  285. #endif
  286. #endif
  287. }
  288. #if defined(SSD1327_SPI_CONTROL) && !defined(SSD1327_SPI_DMA_ENABLE) && !defined(SPI_CS_HARDWARE_CONTROL)
  289. void SSD1327_DmaEndCallback(SPI_HandleTypeDef *hspi)
  290. {
  291. if(hspi == ssd1337_spi)
  292. {
  293. HAL_GPIO_WritePin(SSD1327_CS_GPIO_Port, SSD1327_CS_Pin, GPIO_PIN_SET);
  294. }
  295. }
  296. #endif