stm32g4xx_hal_opamp.h 31 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575
  1. /**
  2. ******************************************************************************
  3. * @file stm32g4xx_hal_opamp.h
  4. * @author MCD Application Team
  5. * @brief Header file of OPAMP HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2019 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32G4xx_HAL_OPAMP_H
  20. #define STM32G4xx_HAL_OPAMP_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32g4xx_hal_def.h"
  26. /** @addtogroup STM32G4xx_HAL_Driver
  27. * @{
  28. */
  29. #if defined (OPAMP1) || defined (OPAMP2) || defined (OPAMP3) || defined (OPAMP4) || defined (OPAMP5) || defined (OPAMP6)
  30. /** @addtogroup OPAMP
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup OPAMP_Exported_Types OPAMP Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief OPAMP Init structure definition
  39. */
  40. typedef struct
  41. {
  42. uint32_t PowerMode; /*!< Specifies the power mode Normal or High Speed.
  43. This parameter must be a value of @ref OPAMP_PowerMode */
  44. uint32_t Mode; /*!< Specifies the OPAMP mode
  45. This parameter must be a value of @ref OPAMP_Mode
  46. mode is either Standalone, Follower or PGA */
  47. uint32_t InvertingInput; /*!< Specifies the inverting input in Standalone & Pga modes
  48. - In Standalone mode: i.e when mode is OPAMP_STANDALONE_MODE
  49. This parameter must be a value of @ref OPAMP_InvertingInput
  50. InvertingInput is either VINM0 or VINM1
  51. - In PGA mode: i.e when mode is OPAMP_PGA_MODE
  52. & in Follower mode i.e when mode is OPAMP_FOLLOWER_MODE
  53. This parameter is Not Applicable */
  54. uint32_t NonInvertingInput; /*!< Specifies the non inverting input of the opamp:
  55. This parameter must be a value of @ref OPAMP_NonInvertingInput
  56. NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */
  57. FunctionalState InternalOutput; /*!< Specifies the configuration of the internal output from OPAMP to ADC.
  58. This parameter can be ENABLE or DISABLE
  59. Note: When this output is enabled, regular output to I/O is disabled */
  60. uint32_t TimerControlledMuxmode; /*!< Specifies if the Timer controlled Mux mode is enabled or disabled
  61. This parameter must be a single value of @ref OPAMP_TimerControlledMuxmode
  62. or a combination of them to build a more complex switch scheme by
  63. using different timers */
  64. uint32_t InvertingInputSecondary; /*!< Specifies the inverting input (secondary) of the opamp when
  65. TimerControlledMuxmode is enabled
  66. i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE
  67. - In Standalone mode: i.e when mode is OPAMP_STANDALONE_MODE
  68. This parameter must be a value of @ref OPAMP_InvertingInputSecondary
  69. InvertingInputSecondary is either VINM0 or VINM1
  70. - In PGA mode: i.e when mode is OPAMP_PGA_MODE
  71. & in Follower mode i.e when mode is OPAMP_FOLLOWER_MODE
  72. This parameter must be a value of @ref OPAMP_InvertingInputSecondary
  73. and is used to choose secondary mode (PGA or follower) */
  74. uint32_t NonInvertingInputSecondary; /*!< Specifies the non inverting input (secondary) of the opamp when
  75. TimerControlledMuxmode is enabled
  76. i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE
  77. This parameter must be a value of @ref OPAMP_NonInvertingInputSecondary
  78. NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */
  79. uint32_t PgaConnect; /*!< Specifies the inverting pin in PGA mode
  80. i.e. when mode is OPAMP_PGA_MODE
  81. This parameter must be a value of @ref OPAMP_PgaConnect
  82. Either: not connected, connected to VINM0
  83. In this last case, VINM0 can then be used to input signal (negative gain case
  84. with or without bias on VINPx) or to input bias (positive gain case with bias) */
  85. uint32_t PgaGain; /*!< Specifies the gain in PGA mode
  86. i.e. when mode is OPAMP_PGA_MODE.
  87. This parameter must be a value of @ref OPAMP_PgaGain
  88. (2, 4, 8, 16, 32 or 64) for positive gain & (-1, -3 ,-7, -15, -31 or -63) for negative gain */
  89. uint32_t UserTrimming; /*!< Specifies the trimming mode
  90. This parameter must be a value of @ref OPAMP_UserTrimming
  91. UserTrimming is either factory or user trimming */
  92. uint32_t TrimmingValueP; /*!< Specifies the offset trimming value (PMOS)
  93. i.e. when UserTrimming is OPAMP_TRIMMING_USER.
  94. This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
  95. uint32_t TrimmingValueN; /*!< Specifies the offset trimming value (NMOS)
  96. i.e. when UserTrimming is OPAMP_TRIMMING_USER.
  97. This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
  98. } OPAMP_InitTypeDef;
  99. /**
  100. * @brief HAL State structures definition
  101. */
  102. typedef enum
  103. {
  104. HAL_OPAMP_STATE_RESET = 0x00000000UL, /*!< OPAMP is not yet Initialized */
  105. HAL_OPAMP_STATE_READY = 0x00000001UL, /*!< OPAMP is initialized and ready for use */
  106. HAL_OPAMP_STATE_CALIBBUSY = 0x00000002UL, /*!< OPAMP is enabled in auto calibration mode */
  107. HAL_OPAMP_STATE_BUSY = 0x00000004UL, /*!< OPAMP is enabled and running in normal mode */
  108. HAL_OPAMP_STATE_BUSYLOCKED = 0x00000005UL, /*!< OPAMP control register is locked
  109. only system reset allows reconfiguring the opamp. */
  110. } HAL_OPAMP_StateTypeDef;
  111. /**
  112. * @brief OPAMP Handle Structure definition
  113. */
  114. #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
  115. typedef struct __OPAMP_HandleTypeDef
  116. #else
  117. typedef struct
  118. #endif
  119. {
  120. OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */
  121. OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */
  122. HAL_StatusTypeDef Status; /*!< OPAMP peripheral status */
  123. HAL_LockTypeDef Lock; /*!< Locking object */
  124. __IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */
  125. #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
  126. void (* MspInitCallback)(struct __OPAMP_HandleTypeDef *hopamp);
  127. void (* MspDeInitCallback)(struct __OPAMP_HandleTypeDef *hopamp);
  128. #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
  129. } OPAMP_HandleTypeDef;
  130. /**
  131. * @brief OPAMP_TrimmingValueTypeDef definition
  132. */
  133. typedef uint32_t OPAMP_TrimmingValueTypeDef;
  134. /**
  135. * @}
  136. */
  137. #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
  138. /**
  139. * @brief HAL OPAMP Callback ID enumeration definition
  140. */
  141. typedef enum
  142. {
  143. HAL_OPAMP_MSPINIT_CB_ID = 0x01UL, /*!< OPAMP MspInit Callback ID */
  144. HAL_OPAMP_MSPDEINIT_CB_ID = 0x02UL, /*!< OPAMP MspDeInit Callback ID */
  145. HAL_OPAMP_ALL_CB_ID = 0x03UL /*!< OPAMP All ID */
  146. } HAL_OPAMP_CallbackIDTypeDef;
  147. /**
  148. * @brief HAL OPAMP Callback pointer definition
  149. */
  150. typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp);
  151. #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
  152. /* Exported constants --------------------------------------------------------*/
  153. /** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants
  154. * @{
  155. */
  156. /** @defgroup OPAMP_Mode OPAMP Mode
  157. * @{
  158. */
  159. #define OPAMP_STANDALONE_MODE (0x00000000UL) /*!< standalone mode */
  160. #define OPAMP_PGA_MODE OPAMP_CSR_VMSEL_1 /*!< PGA mode */
  161. #define OPAMP_FOLLOWER_MODE OPAMP_CSR_VMSEL /*!< follower mode */
  162. /**
  163. * @}
  164. */
  165. /** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input
  166. * @{
  167. */
  168. #define OPAMP_NONINVERTINGINPUT_IO0 (0x00000000UL) /*!< Non inverting input connected to I/O VINP0
  169. (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6)
  170. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  171. #define OPAMP_NONINVERTINGINPUT_IO1 OPAMP_CSR_VPSEL_0 /*!< Non inverting input connected to I/O VINP1
  172. (PA3 for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9 for OPAMP6)
  173. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  174. #define OPAMP_NONINVERTINGINPUT_IO2 OPAMP_CSR_VPSEL_1 /*!< Non inverting input connected to I/O VINP2
  175. (PA7 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PB11 for OPAMP4, PC3 for OPAMP5, PB13 for OPAMP6)
  176. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  177. #define OPAMP_NONINVERTINGINPUT_IO3 OPAMP_CSR_VPSEL /*!< Non inverting input connected to I/O VINP3
  178. (PD14 for OPAMP2) */
  179. #define OPAMP_NONINVERTINGINPUT_DAC OPAMP_CSR_VPSEL /*!< Non inverting input connected internally to DAC channel
  180. (DAC3_CH1 for OPAMP1, DAC3_CH2 for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6)
  181. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  182. /**
  183. * @}
  184. */
  185. /** @defgroup OPAMP_InvertingInput OPAMP Inverting Input
  186. * @{
  187. */
  188. #define OPAMP_INVERTINGINPUT_IO0 (0x00000000UL) /*!< Inverting input connected to I/O VINM0
  189. (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1 for OPAMP6)
  190. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  191. #define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< Inverting input connected to I/0 VINM1
  192. (PC5 for OPAMP1, PC5 for OPAMP2, PB10 for OPAMP3, PB8 for OPAMP4, PA3 for OPAMP5, PB1 for OPAMP6)
  193. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  194. /**
  195. * @}
  196. */
  197. /** @defgroup OPAMP_TimerControlledMuxmode OPAMP Timer Controlled Mux mode
  198. * @note The switch can be controlled either by a single timer or a combination of them,
  199. * in this case application has to 'ORed' the values below
  200. * ex OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6
  201. * @{
  202. */
  203. #define OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE (0x00000000UL) /*!< Timer controlled Mux mode disabled */
  204. #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 OPAMP_TCMR_T1CMEN /*!< Timer controlled Mux mode enabled using TIM1 OC6 */
  205. #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 OPAMP_TCMR_T8CMEN /*!< Timer controlled Mux mode enabled using TIM8 OC6 */
  206. #if defined(TIM20)
  207. #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6 OPAMP_TCMR_T20CMEN /*!< Timer controlled Mux mode enabled using TIM20 OC6
  208. Note: On this STM32 series, TIM20 is not available on all devices. Refer to device datasheet for more details */
  209. #endif
  210. /**
  211. * @}
  212. */
  213. /** @defgroup OPAMP_NonInvertingInputSecondary OPAMP Non Inverting Input Secondary
  214. * @{
  215. */
  216. #define OPAMP_SEC_NONINVERTINGINPUT_IO0 (0x00000000UL) /*!< Secondary non inverting input connected to I/O VINP0
  217. (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6)
  218. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  219. #define OPAMP_SEC_NONINVERTINGINPUT_IO1 OPAMP_TCMR_VPSSEL_0 /*!< Secondary non inverting input connected to I/O VINP1
  220. (PA3 for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9 for OPAMP6)
  221. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  222. #define OPAMP_SEC_NONINVERTINGINPUT_IO2 OPAMP_TCMR_VPSSEL_1 /*!< Secondary non inverting input connected to I/O VINP2
  223. (PA7 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PB11 for OPAMP4, PC3 for OPAMP5, PB13 for OPAMP6)
  224. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  225. #define OPAMP_SEC_NONINVERTINGINPUT_IO3 OPAMP_TCMR_VPSSEL /*!< Secondary non inverting input connected to I/O VINP3
  226. (PD14 for OPAMP2) */
  227. #define OPAMP_SEC_NONINVERTINGINPUT_DAC OPAMP_TCMR_VPSSEL /*!< Secondary non inverting input connected internally to DAC channel
  228. (DAC3_CH1 for OPAMP1, DAC3_CH2 for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6)
  229. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  230. /**
  231. * @}
  232. */
  233. /** @defgroup OPAMP_InvertingInputSecondary OPAMP Inverting Input Secondary
  234. * @{
  235. */
  236. #define OPAMP_SEC_INVERTINGINPUT_IO0 (0x00000000UL) /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE
  237. has been configured by call to @ref HAL_OPAMP_Init().
  238. Secondary inverting input connected to I/O VINM0
  239. (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1 for OPAMP6)
  240. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  241. #define OPAMP_SEC_INVERTINGINPUT_IO1 OPAMP_TCMR_VMSSEL /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE
  242. has been configured by call to @ref HAL_OPAMP_Init().
  243. Secondary inverting input connected to I/0 VINM1
  244. (PC5 for OPAMP1, PC5 for OPAMP2, PB10 for OPAMP3, PB8 for OPAMP4, PA3 for OPAMP5, PB1 for OPAMP6)
  245. Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
  246. #define OPAMP_SEC_INVERTINGINPUT_PGA (0x00000000UL) /*!< OPAMP secondary mode is PGA mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init()
  247. is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE.
  248. OPAMP secondary inverting input is:
  249. - Not connected if configured mode is @ref OPAMP_FOLLOWER_MODE
  250. - Not connected if configured mode is @ref OPAMP_PGA_MODE and PGA connect mode is @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
  251. - Connected to VINM0 and possibly VINM1 if any of the other modes as been configured
  252. (see @ref OPAMP_PgaConnect description for more details on PGA connection modes) */
  253. #define OPAMP_SEC_INVERTINGINPUT_FOLLOWER OPAMP_TCMR_VMSSEL /*!< OPAMP secondary mode is Follower mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init()
  254. is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE.
  255. OPAMP secondary inverting input is not connected. */
  256. /**
  257. * @}
  258. */
  259. /** @defgroup OPAMP_PgaConnect OPAMP Pga Connect
  260. * @{
  261. */
  262. #define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO (0x00000000UL) /*!< In PGA mode, the inverting input is not connected */
  263. #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_4 /*!< In PGA mode, the inverting input is connected to VINM0 for filtering */
  264. #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS OPAMP_CSR_PGGAIN_3 /*!< In PGA mode, the inverting input is connected to VINM0
  265. - Input signal on VINM0, bias on VINPx: negative gain
  266. - Bias on VINM0, input signal on VINPx: positive gain */
  267. #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_4|OPAMP_CSR_PGGAIN_3) /*!< In PGA mode, the inverting input is connected to VINM0
  268. - Input signal on VINM0, bias on VINPx: negative gain
  269. - Bias on VINM0, input signal on VINPx: positive gain
  270. And VINM1 is connected too for filtering */
  271. /**
  272. * @}
  273. */
  274. /** @defgroup OPAMP_PgaGain OPAMP Pga Gain
  275. * @note Gain sign:
  276. * - is positive if the @ref OPAMP_PgaConnect configuration is
  277. * @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
  278. * - may be positive or negative if the @ref OPAMP_PgaConnect configuration is
  279. * @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS
  280. * see @ref OPAMP_PgaConnect for more details
  281. * @{
  282. */
  283. #define OPAMP_PGA_GAIN_2_OR_MINUS_1 (0x00000000UL) /*!< PGA gain could be 2 or -1 */
  284. #define OPAMP_PGA_GAIN_4_OR_MINUS_3 ( OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 4 or -3 */
  285. #define OPAMP_PGA_GAIN_8_OR_MINUS_7 ( OPAMP_CSR_PGGAIN_1 ) /*!< PGA gain could be 8 or -7 */
  286. #define OPAMP_PGA_GAIN_16_OR_MINUS_15 ( OPAMP_CSR_PGGAIN_1 | OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 16 or -15 */
  287. #define OPAMP_PGA_GAIN_32_OR_MINUS_31 (OPAMP_CSR_PGGAIN_2 ) /*!< PGA gain could be 32 or -31 */
  288. #define OPAMP_PGA_GAIN_64_OR_MINUS_63 (OPAMP_CSR_PGGAIN_2 | OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 64 or -63 */
  289. /**
  290. * @}
  291. */
  292. /** @defgroup OPAMP_PowerMode OPAMP PowerMode
  293. * @{
  294. */
  295. #define OPAMP_POWERMODE_NORMALSPEED (0x00000000UL) /*!< Output in normal mode */
  296. #define OPAMP_POWERMODE_HIGHSPEED OPAMP_CSR_HIGHSPEEDEN /*!< Output in highspeed mode */
  297. /**
  298. * @}
  299. */
  300. /** @defgroup OPAMP_UserTrimming OPAMP User Trimming
  301. * @{
  302. */
  303. #define OPAMP_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */
  304. #define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */
  305. /**
  306. * @}
  307. */
  308. /** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming
  309. * @{
  310. */
  311. #define OPAMP_FACTORYTRIMMING_DUMMY (0xFFFFFFFFUL) /*!< Dummy trimming value */
  312. #define OPAMP_FACTORYTRIMMING_N (0x00000000UL) /*!< Offset trimming N */
  313. #define OPAMP_FACTORYTRIMMING_P (0x00000001UL) /*!< Offset trimming P */
  314. /**
  315. * @}
  316. */
  317. /** @defgroup OPAMP_VREF OPAMP VREF
  318. * @{
  319. */
  320. #define OPAMP_VREF_3VDDA (0x00000000UL) /*!< OPAMP Vref = 3.3% VDDA */
  321. #define OPAMP_VREF_10VDDA OPAMP_CSR_CALSEL_0 /*!< OPAMP Vref = 10% VDDA */
  322. #define OPAMP_VREF_50VDDA OPAMP_CSR_CALSEL_1 /*!< OPAMP Vref = 50% VDDA */
  323. #define OPAMP_VREF_90VDDA OPAMP_CSR_CALSEL /*!< OPAMP Vref = 90% VDDA */
  324. /**
  325. * @}
  326. */
  327. /**
  328. * @}
  329. */
  330. /* Private constants ---------------------------------------------------------*/
  331. /** @defgroup OPAMP_Private_Constants OPAMP Private Constants
  332. * @brief OPAMP Private constants and defines
  333. * @{
  334. */
  335. /** @defgroup OPAMP_Input OPAMP Input
  336. * @{
  337. */
  338. #define OPAMP_INPUT_INVERTING ( 24UL) /*!< Inverting input */
  339. #define OPAMP_INPUT_NONINVERTING ( 19UL) /*!< Non inverting input */
  340. #define IS_OPAMP_INPUT(INPUT) (((INPUT) == OPAMP_INPUT_INVERTING) || \
  341. ((INPUT) == OPAMP_INPUT_NONINVERTING))
  342. /**
  343. * @}
  344. */
  345. /**
  346. * @}
  347. */
  348. /* Private macro -------------------------------------------------------------*/
  349. /** @defgroup OPAMP_Private_Macros OPAMP Private Macros
  350. * @{
  351. */
  352. #define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \
  353. ((INPUT) == OPAMP_PGA_MODE) || \
  354. ((INPUT) == OPAMP_FOLLOWER_MODE))
  355. #define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \
  356. ((INPUT) == OPAMP_NONINVERTINGINPUT_IO1) || \
  357. ((INPUT) == OPAMP_NONINVERTINGINPUT_IO2) || \
  358. ((INPUT) == OPAMP_NONINVERTINGINPUT_IO3) || \
  359. ((INPUT) == OPAMP_NONINVERTINGINPUT_DAC))
  360. #define IS_OPAMP_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \
  361. ((INPUT) == OPAMP_INVERTINGINPUT_IO1))
  362. #if defined(TIM20)
  363. #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) \
  364. ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | \
  365. OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 | \
  366. OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6))
  367. #else
  368. #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) \
  369. ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | \
  370. OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6))
  371. #endif
  372. #define IS_OPAMP_SEC_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO0) || \
  373. ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO1) || \
  374. ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO2) || \
  375. ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO3) || \
  376. ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_DAC))
  377. #define IS_OPAMP_SEC_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO0) || \
  378. ((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO1) || \
  379. ((INPUT) == OPAMP_SEC_INVERTINGINPUT_PGA) || \
  380. ((INPUT) == OPAMP_SEC_INVERTINGINPUT_FOLLOWER))
  381. #define IS_OPAMP_PGACONNECT(CONNECT) (((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_NO) || \
  382. ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0) || \
  383. ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS) || \
  384. ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS))
  385. #define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2_OR_MINUS_1) || \
  386. ((GAIN) == OPAMP_PGA_GAIN_4_OR_MINUS_3) || \
  387. ((GAIN) == OPAMP_PGA_GAIN_8_OR_MINUS_7) || \
  388. ((GAIN) == OPAMP_PGA_GAIN_16_OR_MINUS_15) || \
  389. ((GAIN) == OPAMP_PGA_GAIN_32_OR_MINUS_31) || \
  390. ((GAIN) == OPAMP_PGA_GAIN_64_OR_MINUS_63))
  391. #define IS_OPAMP_POWERMODE(POWERMODE) (((POWERMODE) == OPAMP_POWERMODE_NORMALSPEED) || \
  392. ((POWERMODE) == OPAMP_POWERMODE_HIGHSPEED) )
  393. #define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \
  394. ((TRIMMING) == OPAMP_TRIMMING_USER))
  395. #define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \
  396. ((TRIMMING) == OPAMP_FACTORYTRIMMING_P))
  397. #define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1FUL)
  398. #define IS_OPAMP_VREF(VREF) (((VREF) == OPAMP_VREF_3VDDA) || \
  399. ((VREF) == OPAMP_VREF_10VDDA) || \
  400. ((VREF) == OPAMP_VREF_50VDDA) || \
  401. ((VREF) == OPAMP_VREF_90VDDA))
  402. /**
  403. * @}
  404. */
  405. /* Exported macros -----------------------------------------------------------*/
  406. /** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros
  407. * @{
  408. */
  409. /** @brief Reset OPAMP handle state
  410. * @param __HANDLE__ OPAMP handle.
  411. * @retval None
  412. */
  413. #define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET)
  414. /**
  415. * @}
  416. */
  417. /* Include OPAMP HAL Extended module */
  418. #include "stm32g4xx_hal_opamp_ex.h"
  419. /* Exported functions --------------------------------------------------------*/
  420. /** @defgroup OPAMP_Exported_Functions OPAMP Exported Functions
  421. * @{
  422. */
  423. /** @defgroup OPAMP_Exported_Functions_Group1 Initialization and de-initialization functions
  424. * @{
  425. */
  426. /* Initialization/de-initialization functions **********************************/
  427. HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp);
  428. HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp);
  429. void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp);
  430. void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp);
  431. /**
  432. * @}
  433. */
  434. /** @defgroup OPAMP_Exported_Functions_Group2 Input and Output operation functions
  435. * @{
  436. */
  437. /* I/O operation functions *****************************************************/
  438. HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp);
  439. HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp);
  440. HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp);
  441. /**
  442. * @}
  443. */
  444. /** @defgroup OPAMP_Exported_Functions_Group3 Peripheral Control functions
  445. * @{
  446. */
  447. /* Peripheral Control functions ************************************************/
  448. #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
  449. /* OPAMP callback registering/unregistering */
  450. HAL_StatusTypeDef HAL_OPAMP_RegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId,
  451. pOPAMP_CallbackTypeDef pCallback);
  452. HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId);
  453. #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
  454. HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp);
  455. HAL_StatusTypeDef HAL_OPAMP_LockTimerMux(OPAMP_HandleTypeDef *hopamp);
  456. /**
  457. * @}
  458. */
  459. /** @defgroup OPAMP_Exported_Functions_Group4 Peripheral State functions
  460. * @{
  461. */
  462. /* Peripheral State functions **************************************************/
  463. HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp);
  464. OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset(OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset);
  465. /**
  466. * @}
  467. */
  468. /**
  469. * @}
  470. */
  471. /**
  472. * @}
  473. */
  474. #endif /* OPAMP1 || OPAMP2 || OPAMP3 || OPAMP4 || OPAMP5 || OPAMP6 */
  475. /**
  476. * @}
  477. */
  478. #ifdef __cplusplus
  479. }
  480. #endif
  481. #endif /* STM32G4xx_HAL_OPAMP_H */