stm32f0xx_hal_pcd.h 35 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32F0xx_HAL_PCD_H
  20. #define STM32F0xx_HAL_PCD_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f0xx_ll_usb.h"
  26. #if defined (USB)
  27. /** @addtogroup STM32F0xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup PCD
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup PCD_Exported_Types PCD Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief PCD State structure definition
  39. */
  40. typedef enum
  41. {
  42. HAL_PCD_STATE_RESET = 0x00,
  43. HAL_PCD_STATE_READY = 0x01,
  44. HAL_PCD_STATE_ERROR = 0x02,
  45. HAL_PCD_STATE_BUSY = 0x03,
  46. HAL_PCD_STATE_TIMEOUT = 0x04
  47. } PCD_StateTypeDef;
  48. /* Device LPM suspend state */
  49. typedef enum
  50. {
  51. LPM_L0 = 0x00, /* on */
  52. LPM_L1 = 0x01, /* LPM L1 sleep */
  53. LPM_L2 = 0x02, /* suspend */
  54. LPM_L3 = 0x03, /* off */
  55. } PCD_LPM_StateTypeDef;
  56. typedef enum
  57. {
  58. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  59. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  60. } PCD_LPM_MsgTypeDef;
  61. typedef enum
  62. {
  63. PCD_BCD_ERROR = 0xFF,
  64. PCD_BCD_CONTACT_DETECTION = 0xFE,
  65. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  66. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  67. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  68. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  69. } PCD_BCD_MsgTypeDef;
  70. typedef USB_TypeDef PCD_TypeDef;
  71. typedef USB_CfgTypeDef PCD_InitTypeDef;
  72. typedef USB_EPTypeDef PCD_EPTypeDef;
  73. /**
  74. * @brief PCD Handle Structure definition
  75. */
  76. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  77. typedef struct __PCD_HandleTypeDef
  78. #else
  79. typedef struct
  80. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  81. {
  82. PCD_TypeDef *Instance; /*!< Register base address */
  83. PCD_InitTypeDef Init; /*!< PCD required parameters */
  84. __IO uint8_t USB_Address; /*!< USB Address */
  85. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  86. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  87. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  88. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  89. __IO uint32_t ErrorCode; /*!< PCD Error code */
  90. uint32_t Setup[12]; /*!< Setup packet buffer */
  91. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  92. uint32_t BESL;
  93. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  94. This parameter can be set to ENABLE or DISABLE */
  95. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  96. This parameter can be set to ENABLE or DISABLE */
  97. void *pData; /*!< Pointer to upper stack Handler */
  98. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  99. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  100. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  101. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  102. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  103. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  104. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  105. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  106. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  107. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  108. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  109. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  110. void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
  111. void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
  112. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  113. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  114. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  115. } PCD_HandleTypeDef;
  116. /**
  117. * @}
  118. */
  119. /* Include PCD HAL Extended module */
  120. #include "stm32f0xx_hal_pcd_ex.h"
  121. /* Exported constants --------------------------------------------------------*/
  122. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  123. * @{
  124. */
  125. /** @defgroup PCD_Speed PCD Speed
  126. * @{
  127. */
  128. #define PCD_SPEED_FULL USBD_FS_SPEED
  129. /**
  130. * @}
  131. */
  132. /** @defgroup PCD_PHY_Module PCD PHY Module
  133. * @{
  134. */
  135. #define PCD_PHY_ULPI 1U
  136. #define PCD_PHY_EMBEDDED 2U
  137. #define PCD_PHY_UTMI 3U
  138. /**
  139. * @}
  140. */
  141. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  142. * @brief PCD Error Code definition
  143. * @{
  144. */
  145. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  146. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  147. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  148. /**
  149. * @}
  150. */
  151. /**
  152. * @}
  153. */
  154. /* Exported macros -----------------------------------------------------------*/
  155. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  156. * @brief macros to handle interrupts and specific clock configurations
  157. * @{
  158. */
  159. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  160. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  161. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
  162. ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  163. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
  164. &= (uint16_t)(~(__INTERRUPT__)))
  165. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  166. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  167. /**
  168. * @}
  169. */
  170. /* Exported functions --------------------------------------------------------*/
  171. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  172. * @{
  173. */
  174. /* Initialization/de-initialization functions ********************************/
  175. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  176. * @{
  177. */
  178. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  179. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  180. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  181. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  182. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  183. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  184. * @brief HAL USB OTG PCD Callback ID enumeration definition
  185. * @{
  186. */
  187. typedef enum
  188. {
  189. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  190. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  191. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  192. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  193. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  194. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  195. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  196. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  197. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  198. } HAL_PCD_CallbackIDTypeDef;
  199. /**
  200. * @}
  201. */
  202. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  203. * @brief HAL USB OTG PCD Callback pointer definition
  204. * @{
  205. */
  206. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  207. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  208. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  209. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  210. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  211. typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
  212. typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
  213. /**
  214. * @}
  215. */
  216. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
  217. pPCD_CallbackTypeDef pCallback);
  218. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  219. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  220. pPCD_DataOutStageCallbackTypeDef pCallback);
  221. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  222. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  223. pPCD_DataInStageCallbackTypeDef pCallback);
  224. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  225. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  226. pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  227. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  228. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  229. pPCD_IsoInIncpltCallbackTypeDef pCallback);
  230. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  231. HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
  232. HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
  233. HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
  234. HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
  235. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  236. /**
  237. * @}
  238. */
  239. /* I/O operation functions ***************************************************/
  240. /* Non-Blocking mode: Interrupt */
  241. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  242. * @{
  243. */
  244. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  245. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  246. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  247. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  249. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  250. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  251. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  252. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  253. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  254. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  255. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  256. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  257. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  258. /**
  259. * @}
  260. */
  261. /* Peripheral Control functions **********************************************/
  262. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  263. * @{
  264. */
  265. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  266. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  267. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  268. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  269. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  270. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  271. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  272. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  273. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  274. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  275. HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  276. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  277. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  278. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  279. /**
  280. * @}
  281. */
  282. /* Peripheral State functions ************************************************/
  283. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  284. * @{
  285. */
  286. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  287. /**
  288. * @}
  289. */
  290. /**
  291. * @}
  292. */
  293. /* Private constants ---------------------------------------------------------*/
  294. /** @defgroup PCD_Private_Constants PCD Private Constants
  295. * @{
  296. */
  297. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  298. * @{
  299. */
  300. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  301. /**
  302. * @}
  303. */
  304. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  305. * @{
  306. */
  307. #define PCD_EP0MPS_64 EP_MPS_64
  308. #define PCD_EP0MPS_32 EP_MPS_32
  309. #define PCD_EP0MPS_16 EP_MPS_16
  310. #define PCD_EP0MPS_08 EP_MPS_8
  311. /**
  312. * @}
  313. */
  314. /** @defgroup PCD_ENDP PCD ENDP
  315. * @{
  316. */
  317. #define PCD_ENDP0 0U
  318. #define PCD_ENDP1 1U
  319. #define PCD_ENDP2 2U
  320. #define PCD_ENDP3 3U
  321. #define PCD_ENDP4 4U
  322. #define PCD_ENDP5 5U
  323. #define PCD_ENDP6 6U
  324. #define PCD_ENDP7 7U
  325. /**
  326. * @}
  327. */
  328. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  329. * @{
  330. */
  331. #define PCD_SNG_BUF 0U
  332. #define PCD_DBL_BUF 1U
  333. /**
  334. * @}
  335. */
  336. /**
  337. * @}
  338. */
  339. /* Private macros ------------------------------------------------------------*/
  340. /** @defgroup PCD_Private_Macros PCD Private Macros
  341. * @{
  342. */
  343. /******************** Bit definition for USB_COUNTn_RX register *************/
  344. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  345. #define USB_CNTRX_BLSIZE (0x1U << 15)
  346. /* SetENDPOINT */
  347. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
  348. (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  349. /* GetENDPOINT */
  350. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  351. /**
  352. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  353. * @param USBx USB peripheral instance register address.
  354. * @param bEpNum Endpoint Number.
  355. * @param wType Endpoint Type.
  356. * @retval None
  357. */
  358. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
  359. (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  360. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  361. /**
  362. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  363. * @param USBx USB peripheral instance register address.
  364. * @param bEpNum Endpoint Number.
  365. * @retval Endpoint Type
  366. */
  367. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  368. /**
  369. * @brief free buffer used from the application realizing it to the line
  370. * toggles bit SW_BUF in the double buffered endpoint register
  371. * @param USBx USB device.
  372. * @param bEpNum, bDir
  373. * @retval None
  374. */
  375. #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
  376. do { \
  377. if ((bDir) == 0U) \
  378. { \
  379. /* OUT double buffered endpoint */ \
  380. PCD_TX_DTOG((USBx), (bEpNum)); \
  381. } \
  382. else if ((bDir) == 1U) \
  383. { \
  384. /* IN double buffered endpoint */ \
  385. PCD_RX_DTOG((USBx), (bEpNum)); \
  386. } \
  387. } while(0)
  388. /**
  389. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  390. * @param USBx USB peripheral instance register address.
  391. * @param bEpNum Endpoint Number.
  392. * @param wState new state
  393. * @retval None
  394. */
  395. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  396. do { \
  397. uint16_t _wRegVal; \
  398. \
  399. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  400. /* toggle first bit ? */ \
  401. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  402. { \
  403. _wRegVal ^= USB_EPTX_DTOG1; \
  404. } \
  405. /* toggle second bit ? */ \
  406. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  407. { \
  408. _wRegVal ^= USB_EPTX_DTOG2; \
  409. } \
  410. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  411. } while(0) /* PCD_SET_EP_TX_STATUS */
  412. /**
  413. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  414. * @param USBx USB peripheral instance register address.
  415. * @param bEpNum Endpoint Number.
  416. * @param wState new state
  417. * @retval None
  418. */
  419. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  420. do { \
  421. uint16_t _wRegVal; \
  422. \
  423. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  424. /* toggle first bit ? */ \
  425. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  426. { \
  427. _wRegVal ^= USB_EPRX_DTOG1; \
  428. } \
  429. /* toggle second bit ? */ \
  430. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  431. { \
  432. _wRegVal ^= USB_EPRX_DTOG2; \
  433. } \
  434. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  435. } while(0) /* PCD_SET_EP_RX_STATUS */
  436. /**
  437. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  438. * @param USBx USB peripheral instance register address.
  439. * @param bEpNum Endpoint Number.
  440. * @param wStaterx new state.
  441. * @param wStatetx new state.
  442. * @retval None
  443. */
  444. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  445. do { \
  446. uint16_t _wRegVal; \
  447. \
  448. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  449. /* toggle first bit ? */ \
  450. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  451. { \
  452. _wRegVal ^= USB_EPRX_DTOG1; \
  453. } \
  454. /* toggle second bit ? */ \
  455. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  456. { \
  457. _wRegVal ^= USB_EPRX_DTOG2; \
  458. } \
  459. /* toggle first bit ? */ \
  460. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  461. { \
  462. _wRegVal ^= USB_EPTX_DTOG1; \
  463. } \
  464. /* toggle second bit ? */ \
  465. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  466. { \
  467. _wRegVal ^= USB_EPTX_DTOG2; \
  468. } \
  469. \
  470. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  471. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  472. /**
  473. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  474. * /STAT_RX[1:0])
  475. * @param USBx USB peripheral instance register address.
  476. * @param bEpNum Endpoint Number.
  477. * @retval status
  478. */
  479. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  480. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  481. /**
  482. * @brief sets directly the VALID tx/rx-status into the endpoint register
  483. * @param USBx USB peripheral instance register address.
  484. * @param bEpNum Endpoint Number.
  485. * @retval None
  486. */
  487. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  488. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  489. /**
  490. * @brief checks stall condition in an endpoint.
  491. * @param USBx USB peripheral instance register address.
  492. * @param bEpNum Endpoint Number.
  493. * @retval TRUE = endpoint in stall condition.
  494. */
  495. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  496. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  497. /**
  498. * @brief set & clear EP_KIND bit.
  499. * @param USBx USB peripheral instance register address.
  500. * @param bEpNum Endpoint Number.
  501. * @retval None
  502. */
  503. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  504. do { \
  505. uint16_t _wRegVal; \
  506. \
  507. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  508. \
  509. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  510. } while(0) /* PCD_SET_EP_KIND */
  511. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  512. do { \
  513. uint16_t _wRegVal; \
  514. \
  515. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  516. \
  517. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  518. } while(0) /* PCD_CLEAR_EP_KIND */
  519. /**
  520. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  521. * @param USBx USB peripheral instance register address.
  522. * @param bEpNum Endpoint Number.
  523. * @retval None
  524. */
  525. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  526. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  527. /**
  528. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  529. * @param USBx USB peripheral instance register address.
  530. * @param bEpNum Endpoint Number.
  531. * @retval None
  532. */
  533. #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  534. #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  535. /**
  536. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  537. * @param USBx USB peripheral instance register address.
  538. * @param bEpNum Endpoint Number.
  539. * @retval None
  540. */
  541. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  542. do { \
  543. uint16_t _wRegVal; \
  544. \
  545. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  546. \
  547. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  548. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  549. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  550. do { \
  551. uint16_t _wRegVal; \
  552. \
  553. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  554. \
  555. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  556. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  557. /**
  558. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  559. * @param USBx USB peripheral instance register address.
  560. * @param bEpNum Endpoint Number.
  561. * @retval None
  562. */
  563. #define PCD_RX_DTOG(USBx, bEpNum) \
  564. do { \
  565. uint16_t _wEPVal; \
  566. \
  567. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  568. \
  569. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  570. } while(0) /* PCD_RX_DTOG */
  571. #define PCD_TX_DTOG(USBx, bEpNum) \
  572. do { \
  573. uint16_t _wEPVal; \
  574. \
  575. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  576. \
  577. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  578. } while(0) /* PCD_TX_DTOG */
  579. /**
  580. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  581. * @param USBx USB peripheral instance register address.
  582. * @param bEpNum Endpoint Number.
  583. * @retval None
  584. */
  585. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  586. do { \
  587. uint16_t _wRegVal; \
  588. \
  589. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  590. \
  591. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  592. { \
  593. PCD_RX_DTOG((USBx), (bEpNum)); \
  594. } \
  595. } while(0) /* PCD_CLEAR_RX_DTOG */
  596. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  597. do { \
  598. uint16_t _wRegVal; \
  599. \
  600. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  601. \
  602. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  603. { \
  604. PCD_TX_DTOG((USBx), (bEpNum)); \
  605. } \
  606. } while(0) /* PCD_CLEAR_TX_DTOG */
  607. /**
  608. * @brief Sets address in an endpoint register.
  609. * @param USBx USB peripheral instance register address.
  610. * @param bEpNum Endpoint Number.
  611. * @param bAddr Address.
  612. * @retval None
  613. */
  614. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  615. do { \
  616. uint16_t _wRegVal; \
  617. \
  618. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  619. \
  620. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  621. } while(0) /* PCD_SET_EP_ADDRESS */
  622. /**
  623. * @brief Gets address in an endpoint register.
  624. * @param USBx USB peripheral instance register address.
  625. * @param bEpNum Endpoint Number.
  626. * @retval None
  627. */
  628. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  629. #define PCD_EP_TX_CNT(USBx, bEpNum) \
  630. ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  631. ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  632. #define PCD_EP_RX_CNT(USBx, bEpNum) \
  633. ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  634. ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  635. /**
  636. * @brief sets address of the tx/rx buffer.
  637. * @param USBx USB peripheral instance register address.
  638. * @param bEpNum Endpoint Number.
  639. * @param wAddr address to be set (must be word aligned).
  640. * @retval None
  641. */
  642. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  643. do { \
  644. __IO uint16_t *_wRegVal; \
  645. uint32_t _wRegBase = (uint32_t)USBx; \
  646. \
  647. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  648. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  649. *_wRegVal = ((wAddr) >> 1) << 1; \
  650. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  651. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  652. do { \
  653. __IO uint16_t *_wRegVal; \
  654. uint32_t _wRegBase = (uint32_t)USBx; \
  655. \
  656. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  657. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  658. *_wRegVal = ((wAddr) >> 1) << 1; \
  659. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  660. /**
  661. * @brief Gets address of the tx/rx buffer.
  662. * @param USBx USB peripheral instance register address.
  663. * @param bEpNum Endpoint Number.
  664. * @retval address of the buffer.
  665. */
  666. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  667. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  668. /**
  669. * @brief Sets counter of rx buffer with no. of blocks.
  670. * @param pdwReg Register pointer
  671. * @param wCount Counter.
  672. * @param wNBlocks no. of Blocks.
  673. * @retval None
  674. */
  675. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  676. do { \
  677. (wNBlocks) = (wCount) >> 5; \
  678. if (((wCount) & 0x1fU) == 0U) \
  679. { \
  680. (wNBlocks)--; \
  681. } \
  682. *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  683. } while(0) /* PCD_CALC_BLK32 */
  684. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  685. do { \
  686. (wNBlocks) = (wCount) >> 1; \
  687. if (((wCount) & 0x1U) != 0U) \
  688. { \
  689. (wNBlocks)++; \
  690. } \
  691. *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
  692. } while(0) /* PCD_CALC_BLK2 */
  693. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  694. do { \
  695. uint32_t wNBlocks; \
  696. \
  697. *(pdwReg) &= 0x3FFU; \
  698. \
  699. if ((wCount) > 62U) \
  700. { \
  701. PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  702. } \
  703. else \
  704. { \
  705. if ((wCount) == 0U) \
  706. { \
  707. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  708. } \
  709. else \
  710. { \
  711. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  712. } \
  713. } \
  714. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  715. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  716. do { \
  717. uint32_t _wRegBase = (uint32_t)(USBx); \
  718. __IO uint16_t *pdwReg; \
  719. \
  720. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  721. pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  722. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  723. } while(0)
  724. /**
  725. * @brief sets counter for the tx/rx buffer.
  726. * @param USBx USB peripheral instance register address.
  727. * @param bEpNum Endpoint Number.
  728. * @param wCount Counter value.
  729. * @retval None
  730. */
  731. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  732. do { \
  733. uint32_t _wRegBase = (uint32_t)(USBx); \
  734. __IO uint16_t *_wRegVal; \
  735. \
  736. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  737. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  738. *_wRegVal = (uint16_t)(wCount); \
  739. } while(0)
  740. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  741. do { \
  742. uint32_t _wRegBase = (uint32_t)(USBx); \
  743. __IO uint16_t *_wRegVal; \
  744. \
  745. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  746. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  747. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  748. } while(0)
  749. /**
  750. * @brief gets counter of the tx buffer.
  751. * @param USBx USB peripheral instance register address.
  752. * @param bEpNum Endpoint Number.
  753. * @retval Counter value
  754. */
  755. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  756. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  757. /**
  758. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  759. * @param USBx USB peripheral instance register address.
  760. * @param bEpNum Endpoint Number.
  761. * @param wBuf0Addr buffer 0 address.
  762. * @retval Counter value
  763. */
  764. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  765. do { \
  766. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  767. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  768. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  769. do { \
  770. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  771. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  772. /**
  773. * @brief Sets addresses in a double buffer endpoint.
  774. * @param USBx USB peripheral instance register address.
  775. * @param bEpNum Endpoint Number.
  776. * @param wBuf0Addr: buffer 0 address.
  777. * @param wBuf1Addr = buffer 1 address.
  778. * @retval None
  779. */
  780. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  781. do { \
  782. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  783. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  784. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  785. /**
  786. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  787. * @param USBx USB peripheral instance register address.
  788. * @param bEpNum Endpoint Number.
  789. * @retval None
  790. */
  791. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  792. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  793. /**
  794. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  795. * @param USBx USB peripheral instance register address.
  796. * @param bEpNum Endpoint Number.
  797. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  798. * EP_DBUF_IN = IN
  799. * @param wCount: Counter value
  800. * @retval None
  801. */
  802. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  803. do { \
  804. if ((bDir) == 0U) \
  805. /* OUT endpoint */ \
  806. { \
  807. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  808. } \
  809. else \
  810. { \
  811. if ((bDir) == 1U) \
  812. { \
  813. /* IN endpoint */ \
  814. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  815. } \
  816. } \
  817. } while(0) /* SetEPDblBuf0Count*/
  818. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  819. do { \
  820. uint32_t _wBase = (uint32_t)(USBx); \
  821. __IO uint16_t *_wEPRegVal; \
  822. \
  823. if ((bDir) == 0U) \
  824. { \
  825. /* OUT endpoint */ \
  826. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  827. } \
  828. else \
  829. { \
  830. if ((bDir) == 1U) \
  831. { \
  832. /* IN endpoint */ \
  833. _wBase += (uint32_t)(USBx)->BTABLE; \
  834. _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  835. *_wEPRegVal = (uint16_t)(wCount); \
  836. } \
  837. } \
  838. } while(0) /* SetEPDblBuf1Count */
  839. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  840. do { \
  841. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  842. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  843. } while(0) /* PCD_SET_EP_DBUF_CNT */
  844. /**
  845. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  846. * @param USBx USB peripheral instance register address.
  847. * @param bEpNum Endpoint Number.
  848. * @retval None
  849. */
  850. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  851. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  852. /**
  853. * @}
  854. */
  855. /**
  856. * @}
  857. */
  858. /**
  859. * @}
  860. */
  861. #endif /* defined (USB) */
  862. #ifdef __cplusplus
  863. }
  864. #endif
  865. #endif /* STM32F0xx_HAL_PCD_H */