startup_stm32l053xx.s 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281
  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32l053xx.s
  4. * @author MCD Application Team
  5. * @brief STM32L053xx Devices vector table for GCC toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Branches to main in the C library (which eventually
  11. * calls main()).
  12. * After Reset the Cortex-M0+ processor is in Thread mode,
  13. * priority is Privileged, and the Stack is set to Main.
  14. ******************************************************************************
  15. * @attention
  16. *
  17. * Copyright (c) 2016 STMicroelectronics.
  18. * All rights reserved.
  19. *
  20. * This software is licensed under terms that can be found in the LICENSE file
  21. * in the root directory of this software component.
  22. * If no LICENSE file comes with this software, it is provided AS-IS.
  23. *
  24. ******************************************************************************
  25. */
  26. .syntax unified
  27. .cpu cortex-m0plus
  28. .fpu softvfp
  29. .thumb
  30. .global g_pfnVectors
  31. .global Default_Handler
  32. /* start address for the initialization values of the .data section.
  33. defined in linker script */
  34. .word _sidata
  35. /* start address for the .data section. defined in linker script */
  36. .word _sdata
  37. /* end address for the .data section. defined in linker script */
  38. .word _edata
  39. /* start address for the .bss section. defined in linker script */
  40. .word _sbss
  41. /* end address for the .bss section. defined in linker script */
  42. .word _ebss
  43. .section .text.Reset_Handler
  44. .weak Reset_Handler
  45. .type Reset_Handler, %function
  46. Reset_Handler:
  47. ldr r0, =_estack
  48. mov sp, r0 /* set stack pointer */
  49. /* Call the clock system initialization function.*/
  50. bl SystemInit
  51. /* Copy the data segment initializers from flash to SRAM */
  52. ldr r0, =_sdata
  53. ldr r1, =_edata
  54. ldr r2, =_sidata
  55. movs r3, #0
  56. b LoopCopyDataInit
  57. CopyDataInit:
  58. ldr r4, [r2, r3]
  59. str r4, [r0, r3]
  60. adds r3, r3, #4
  61. LoopCopyDataInit:
  62. adds r4, r0, r3
  63. cmp r4, r1
  64. bcc CopyDataInit
  65. /* Zero fill the bss segment. */
  66. ldr r2, =_sbss
  67. ldr r4, =_ebss
  68. movs r3, #0
  69. b LoopFillZerobss
  70. FillZerobss:
  71. str r3, [r2]
  72. adds r2, r2, #4
  73. LoopFillZerobss:
  74. cmp r2, r4
  75. bcc FillZerobss
  76. /* Call static constructors */
  77. bl __libc_init_array
  78. /* Call the application's entry point.*/
  79. bl main
  80. LoopForever:
  81. b LoopForever
  82. .size Reset_Handler, .-Reset_Handler
  83. /**
  84. * @brief This is the code that gets called when the processor receives an
  85. * unexpected interrupt. This simply enters an infinite loop, preserving
  86. * the system state for examination by a debugger.
  87. *
  88. * @param None
  89. * @retval : None
  90. */
  91. .section .text.Default_Handler,"ax",%progbits
  92. Default_Handler:
  93. Infinite_Loop:
  94. b Infinite_Loop
  95. .size Default_Handler, .-Default_Handler
  96. /******************************************************************************
  97. *
  98. * The minimal vector table for a Cortex M0. Note that the proper constructs
  99. * must be placed on this to ensure that it ends up at physical address
  100. * 0x0000.0000.
  101. *
  102. ******************************************************************************/
  103. .section .isr_vector,"a",%progbits
  104. .type g_pfnVectors, %object
  105. .size g_pfnVectors, .-g_pfnVectors
  106. g_pfnVectors:
  107. .word _estack
  108. .word Reset_Handler
  109. .word NMI_Handler
  110. .word HardFault_Handler
  111. .word 0
  112. .word 0
  113. .word 0
  114. .word 0
  115. .word 0
  116. .word 0
  117. .word 0
  118. .word SVC_Handler
  119. .word 0
  120. .word 0
  121. .word PendSV_Handler
  122. .word SysTick_Handler
  123. .word WWDG_IRQHandler /* Window WatchDog */
  124. .word PVD_IRQHandler /* PVD through EXTI Line detection */
  125. .word RTC_IRQHandler /* RTC through the EXTI line */
  126. .word FLASH_IRQHandler /* FLASH */
  127. .word RCC_CRS_IRQHandler /* RCC and CRS */
  128. .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
  129. .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
  130. .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
  131. .word TSC_IRQHandler /* TSC */
  132. .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
  133. .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
  134. .word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
  135. .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
  136. .word LPTIM1_IRQHandler /* LPTIM1 */
  137. .word 0 /* Reserved */
  138. .word TIM2_IRQHandler /* TIM2 */
  139. .word 0 /* Reserved */
  140. .word TIM6_DAC_IRQHandler /* TIM6 and DAC */
  141. .word 0 /* Reserved */
  142. .word 0 /* Reserved */
  143. .word TIM21_IRQHandler /* TIM21 */
  144. .word 0 /* Reserved */
  145. .word TIM22_IRQHandler /* TIM22 */
  146. .word I2C1_IRQHandler /* I2C1 */
  147. .word I2C2_IRQHandler /* I2C2 */
  148. .word SPI1_IRQHandler /* SPI1 */
  149. .word SPI2_IRQHandler /* SPI2 */
  150. .word USART1_IRQHandler /* USART1 */
  151. .word USART2_IRQHandler /* USART2 */
  152. .word RNG_LPUART1_IRQHandler /* RNG and LPUART1 */
  153. .word LCD_IRQHandler /* LCD */
  154. .word USB_IRQHandler /* USB */
  155. /*******************************************************************************
  156. *
  157. * Provide weak aliases for each Exception handler to the Default_Handler.
  158. * As they are weak aliases, any function with the same name will override
  159. * this definition.
  160. *
  161. *******************************************************************************/
  162. .weak NMI_Handler
  163. .thumb_set NMI_Handler,Default_Handler
  164. .weak HardFault_Handler
  165. .thumb_set HardFault_Handler,Default_Handler
  166. .weak SVC_Handler
  167. .thumb_set SVC_Handler,Default_Handler
  168. .weak PendSV_Handler
  169. .thumb_set PendSV_Handler,Default_Handler
  170. .weak SysTick_Handler
  171. .thumb_set SysTick_Handler,Default_Handler
  172. .weak WWDG_IRQHandler
  173. .thumb_set WWDG_IRQHandler,Default_Handler
  174. .weak PVD_IRQHandler
  175. .thumb_set PVD_IRQHandler,Default_Handler
  176. .weak RTC_IRQHandler
  177. .thumb_set RTC_IRQHandler,Default_Handler
  178. .weak FLASH_IRQHandler
  179. .thumb_set FLASH_IRQHandler,Default_Handler
  180. .weak RCC_CRS_IRQHandler
  181. .thumb_set RCC_CRS_IRQHandler,Default_Handler
  182. .weak EXTI0_1_IRQHandler
  183. .thumb_set EXTI0_1_IRQHandler,Default_Handler
  184. .weak EXTI2_3_IRQHandler
  185. .thumb_set EXTI2_3_IRQHandler,Default_Handler
  186. .weak EXTI4_15_IRQHandler
  187. .thumb_set EXTI4_15_IRQHandler,Default_Handler
  188. .weak TSC_IRQHandler
  189. .thumb_set TSC_IRQHandler,Default_Handler
  190. .weak DMA1_Channel1_IRQHandler
  191. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  192. .weak DMA1_Channel2_3_IRQHandler
  193. .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
  194. .weak DMA1_Channel4_5_6_7_IRQHandler
  195. .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
  196. .weak ADC1_COMP_IRQHandler
  197. .thumb_set ADC1_COMP_IRQHandler,Default_Handler
  198. .weak LPTIM1_IRQHandler
  199. .thumb_set LPTIM1_IRQHandler,Default_Handler
  200. .weak TIM2_IRQHandler
  201. .thumb_set TIM2_IRQHandler,Default_Handler
  202. .weak TIM6_DAC_IRQHandler
  203. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  204. .weak TIM21_IRQHandler
  205. .thumb_set TIM21_IRQHandler,Default_Handler
  206. .weak TIM22_IRQHandler
  207. .thumb_set TIM22_IRQHandler,Default_Handler
  208. .weak I2C1_IRQHandler
  209. .thumb_set I2C1_IRQHandler,Default_Handler
  210. .weak I2C2_IRQHandler
  211. .thumb_set I2C2_IRQHandler,Default_Handler
  212. .weak SPI1_IRQHandler
  213. .thumb_set SPI1_IRQHandler,Default_Handler
  214. .weak SPI2_IRQHandler
  215. .thumb_set SPI2_IRQHandler,Default_Handler
  216. .weak USART1_IRQHandler
  217. .thumb_set USART1_IRQHandler,Default_Handler
  218. .weak USART2_IRQHandler
  219. .thumb_set USART2_IRQHandler,Default_Handler
  220. .weak RNG_LPUART1_IRQHandler
  221. .thumb_set RNG_LPUART1_IRQHandler,Default_Handler
  222. .weak LCD_IRQHandler
  223. .thumb_set LCD_IRQHandler,Default_Handler
  224. .weak USB_IRQHandler
  225. .thumb_set USB_IRQHandler,Default_Handler