stm32l0xx_hal_dma.c 27 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_dma.c
  4. * @author MCD Application Team
  5. * @brief DMA HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Direct Memory Access (DMA) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State and errors functions
  11. *
  12. ******************************************************************************
  13. * @attention
  14. *
  15. * Copyright (c) 2016 STMicroelectronics.
  16. * All rights reserved.
  17. *
  18. * This software is licensed under terms that can be found in the LICENSE file
  19. * in the root directory of this software component.
  20. * If no LICENSE file comes with this software, it is provided AS-IS.
  21. *
  22. ******************************************************************************
  23. @verbatim
  24. ==============================================================================
  25. ##### How to use this driver #####
  26. ==============================================================================
  27. [..]
  28. (#) Enable and configure the peripheral to be connected to the DMA Channel
  29. (except for internal SRAM / FLASH memories: no initialization is
  30. necessary).
  31. (#) For a given Channel, program the required configuration through the following parameters:
  32. Channel request, Transfer Direction, Source and Destination data formats,
  33. Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
  34. using HAL_DMA_Init() function.
  35. (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  36. detection.
  37. (#) Use HAL_DMA_Abort() function to abort the current transfer
  38. -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
  39. *** Polling mode IO operation ***
  40. =================================
  41. [..]
  42. (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  43. address and destination address and the Length of data to be transferred
  44. (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  45. case a fixed Timeout can be configured by User depending from his application.
  46. *** Interrupt mode IO operation ***
  47. ===================================
  48. [..]
  49. (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  50. (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  51. (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  52. Source address and destination address and the Length of data to be transferred.
  53. In this case the DMA interrupt is configured
  54. (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  55. (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  56. add his own function to register callbacks with HAL_DMA_RegisterCallback().
  57. *** DMA HAL driver macros list ***
  58. =============================================
  59. [..]
  60. Below the list of macros in DMA HAL driver.
  61. (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
  62. (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
  63. (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
  64. (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
  65. (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
  66. (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
  67. (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
  68. [..]
  69. (@) You can refer to the DMA HAL driver header file for more useful macros
  70. @endverbatim
  71. ******************************************************************************
  72. */
  73. /* Includes ------------------------------------------------------------------*/
  74. #include "stm32l0xx_hal.h"
  75. /** @addtogroup STM32L0xx_HAL_Driver
  76. * @{
  77. */
  78. /** @defgroup DMA DMA
  79. * @brief DMA HAL module driver
  80. * @{
  81. */
  82. #ifdef HAL_DMA_MODULE_ENABLED
  83. /* Private typedef -----------------------------------------------------------*/
  84. /** @defgroup DMA_Private_Functions DMA Private Functions
  85. * @{
  86. */
  87. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
  88. /**
  89. * @}
  90. */
  91. /* Exported functions ---------------------------------------------------------*/
  92. /** @defgroup DMA_Exported_Functions DMA Exported Functions
  93. * @{
  94. */
  95. /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
  96. * @brief Initialization and de-initialization functions
  97. *
  98. @verbatim
  99. ===============================================================================
  100. ##### Initialization and de-initialization functions #####
  101. ===============================================================================
  102. [..]
  103. This section provides functions allowing to initialize the DMA Channel source
  104. and destination addresses, incrementation and data sizes, transfer direction,
  105. circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
  106. [..]
  107. The HAL_DMA_Init() function follows the DMA configuration procedures as described in
  108. reference manual.
  109. @endverbatim
  110. * @{
  111. */
  112. /**
  113. * @brief Initialize the DMA according to the specified
  114. * parameters in the DMA_InitTypeDef and initialize the associated handle.
  115. * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
  116. * the configuration information for the specified DMA Channel.
  117. * @retval HAL status
  118. */
  119. HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
  120. {
  121. uint32_t tmp;
  122. /* Check the DMA handle allocation */
  123. if(hdma == NULL)
  124. {
  125. return HAL_ERROR;
  126. }
  127. /* Check the parameters */
  128. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  129. assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
  130. assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
  131. assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
  132. assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
  133. assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  134. assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  135. assert_param(IS_DMA_MODE(hdma->Init.Mode));
  136. assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
  137. /* Compute the channel index */
  138. /* Only one DMA: DMA1 */
  139. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  140. hdma->DmaBaseAddress = DMA1;
  141. /* Change DMA peripheral state */
  142. hdma->State = HAL_DMA_STATE_BUSY;
  143. /* Get the CR register value */
  144. tmp = hdma->Instance->CCR;
  145. /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */
  146. tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE |
  147. DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
  148. DMA_CCR_DIR | DMA_CCR_MEM2MEM));
  149. /* Prepare the DMA Channel configuration */
  150. tmp |= hdma->Init.Direction |
  151. hdma->Init.PeriphInc | hdma->Init.MemInc |
  152. hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
  153. hdma->Init.Mode | hdma->Init.Priority;
  154. /* Write to DMA Channel CR register */
  155. hdma->Instance->CCR = tmp;
  156. /* Set request selection */
  157. if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
  158. {
  159. /* Write to DMA channel selection register */
  160. /* Reset request selection for DMA1 Channelx */
  161. DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU));
  162. /* Configure request selection for DMA1 Channelx */
  163. DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU));
  164. }
  165. /* Initialise the error code */
  166. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  167. /* Initialize the DMA state*/
  168. hdma->State = HAL_DMA_STATE_READY;
  169. /* Allocate lock resource and initialize it */
  170. hdma->Lock = HAL_UNLOCKED;
  171. return HAL_OK;
  172. }
  173. /**
  174. * @brief DeInitialize the DMA peripheral.
  175. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  176. * the configuration information for the specified DMA Channel.
  177. * @retval HAL status
  178. */
  179. HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
  180. {
  181. /* Check the DMA handle allocation */
  182. if (NULL == hdma )
  183. {
  184. return HAL_ERROR;
  185. }
  186. /* Check the parameters */
  187. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  188. /* Disable the selected DMA Channelx */
  189. __HAL_DMA_DISABLE(hdma);
  190. /* Compute the channel index */
  191. /* DMA1 */
  192. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  193. hdma->DmaBaseAddress = DMA1;
  194. /* Reset DMA Channel control register */
  195. hdma->Instance->CCR = 0U;
  196. /* Clear all flags */
  197. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
  198. /* Reset DMA channel selection register */
  199. /* DMA1 */
  200. DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU));
  201. /* Clean callbacks */
  202. hdma->XferCpltCallback = NULL;
  203. hdma->XferHalfCpltCallback = NULL;
  204. hdma->XferErrorCallback = NULL;
  205. hdma->XferAbortCallback = NULL;
  206. /* Initialise the error code */
  207. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  208. /* Initialize the DMA state */
  209. hdma->State = HAL_DMA_STATE_RESET;
  210. /* Release Lock */
  211. __HAL_UNLOCK(hdma);
  212. return HAL_OK;
  213. }
  214. /**
  215. * @}
  216. */
  217. /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
  218. * @brief Input and Output operation functions
  219. *
  220. @verbatim
  221. ===============================================================================
  222. ##### IO operation functions #####
  223. ===============================================================================
  224. [..] This section provides functions allowing to:
  225. (+) Configure the source, destination address and data length and Start DMA transfer
  226. (+) Configure the source, destination address and data length and
  227. Start DMA transfer with interrupt
  228. (+) Abort DMA transfer
  229. (+) Poll for transfer complete
  230. (+) Handle DMA interrupt request
  231. @endverbatim
  232. * @{
  233. */
  234. /**
  235. * @brief Start the DMA Transfer.
  236. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  237. * the configuration information for the specified DMA Channel.
  238. * @param SrcAddress The source memory Buffer address
  239. * @param DstAddress The destination memory Buffer address
  240. * @param DataLength The amount of data items to be transferred from source to destination
  241. * @retval HAL status
  242. */
  243. HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  244. {
  245. HAL_StatusTypeDef status = HAL_OK;
  246. /* Check the parameters */
  247. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  248. /* Process locked */
  249. __HAL_LOCK(hdma);
  250. if(HAL_DMA_STATE_READY == hdma->State)
  251. {
  252. /* Change DMA peripheral state */
  253. hdma->State = HAL_DMA_STATE_BUSY;
  254. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  255. /* Disable the peripheral */
  256. __HAL_DMA_DISABLE(hdma);
  257. /* Configure the source, destination address and the data length & clear flags*/
  258. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  259. /* Enable the Peripheral */
  260. __HAL_DMA_ENABLE(hdma);
  261. }
  262. else
  263. {
  264. /* Process Unlocked */
  265. __HAL_UNLOCK(hdma);
  266. status = HAL_BUSY;
  267. }
  268. return status;
  269. }
  270. /**
  271. * @brief Start the DMA Transfer with interrupt enabled.
  272. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  273. * the configuration information for the specified DMA Channel.
  274. * @param SrcAddress The source memory Buffer address
  275. * @param DstAddress The destination memory Buffer address
  276. * @param DataLength The amount of data items to be transferred from source to destination
  277. * @retval HAL status
  278. */
  279. HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  280. {
  281. HAL_StatusTypeDef status = HAL_OK;
  282. /* Check the parameters */
  283. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  284. /* Process locked */
  285. __HAL_LOCK(hdma);
  286. if(HAL_DMA_STATE_READY == hdma->State)
  287. {
  288. /* Change DMA peripheral state */
  289. hdma->State = HAL_DMA_STATE_BUSY;
  290. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  291. /* Disable the peripheral */
  292. __HAL_DMA_DISABLE(hdma);
  293. /* Configure the source, destination address and the data length & clear flags*/
  294. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  295. /* Enable the transfer complete interrupt */
  296. /* Enable the transfer Error interrupt */
  297. if(NULL != hdma->XferHalfCpltCallback )
  298. {
  299. /* Enable the Half transfer complete interrupt as well */
  300. __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  301. }
  302. else
  303. {
  304. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  305. __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
  306. }
  307. /* Enable the Peripheral */
  308. __HAL_DMA_ENABLE(hdma);
  309. }
  310. else
  311. {
  312. /* Process Unlocked */
  313. __HAL_UNLOCK(hdma);
  314. /* Remain BUSY */
  315. status = HAL_BUSY;
  316. }
  317. return status;
  318. }
  319. /**
  320. * @brief Abort the DMA Transfer.
  321. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  322. * the configuration information for the specified DMA Channel.
  323. * @retval HAL status
  324. */
  325. HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
  326. {
  327. HAL_StatusTypeDef status = HAL_OK;
  328. /* Check the DMA peripheral state */
  329. if(hdma->State != HAL_DMA_STATE_BUSY)
  330. {
  331. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  332. /* Process Unlocked */
  333. __HAL_UNLOCK(hdma);
  334. return HAL_ERROR;
  335. }
  336. else
  337. {
  338. /* Disable DMA IT */
  339. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  340. /* Disable the channel */
  341. __HAL_DMA_DISABLE(hdma);
  342. /* Clear all flags */
  343. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
  344. /* Change the DMA state */
  345. hdma->State = HAL_DMA_STATE_READY;
  346. /* Process Unlocked */
  347. __HAL_UNLOCK(hdma);
  348. return status;
  349. }
  350. }
  351. /**
  352. * @brief Aborts the DMA Transfer in Interrupt mode.
  353. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  354. * the configuration information for the specified DMA Channel.
  355. * @retval HAL status
  356. */
  357. HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
  358. {
  359. HAL_StatusTypeDef status = HAL_OK;
  360. if(HAL_DMA_STATE_BUSY != hdma->State)
  361. {
  362. /* no transfer ongoing */
  363. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  364. status = HAL_ERROR;
  365. }
  366. else
  367. {
  368. /* Disable DMA IT */
  369. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  370. /* Disable the channel */
  371. __HAL_DMA_DISABLE(hdma);
  372. /* Clear all flags */
  373. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
  374. /* Change the DMA state */
  375. hdma->State = HAL_DMA_STATE_READY;
  376. /* Process Unlocked */
  377. __HAL_UNLOCK(hdma);
  378. /* Call User Abort callback */
  379. if(hdma->XferAbortCallback != NULL)
  380. {
  381. hdma->XferAbortCallback(hdma);
  382. }
  383. }
  384. return status;
  385. }
  386. /**
  387. * @brief Polling for transfer complete.
  388. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  389. * the configuration information for the specified DMA Channel.
  390. * @param CompleteLevel Specifies the DMA level complete.
  391. * @param Timeout Timeout duration.
  392. * @retval HAL status
  393. */
  394. HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
  395. {
  396. uint32_t temp;
  397. uint32_t tickstart;
  398. if(HAL_DMA_STATE_BUSY != hdma->State)
  399. {
  400. /* no transfer ongoing */
  401. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  402. __HAL_UNLOCK(hdma);
  403. return HAL_ERROR;
  404. }
  405. /* Polling mode not supported in circular mode */
  406. if (0U != (hdma->Instance->CCR & DMA_CCR_CIRC))
  407. {
  408. hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
  409. return HAL_ERROR;
  410. }
  411. /* Get the level transfer complete flag */
  412. if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
  413. {
  414. /* Transfer Complete flag */
  415. temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU);
  416. }
  417. else
  418. {
  419. /* Half Transfer Complete flag */
  420. temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU);
  421. }
  422. /* Get tick */
  423. tickstart = HAL_GetTick();
  424. while(0U == (hdma->DmaBaseAddress->ISR & temp))
  425. {
  426. if((0U != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1cU)))))
  427. {
  428. /* When a DMA transfer error occurs */
  429. /* A hardware clear of its EN bits is performed */
  430. /* Clear all flags */
  431. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
  432. /* Update error code */
  433. hdma->ErrorCode = HAL_DMA_ERROR_TE;
  434. /* Change the DMA state */
  435. hdma->State= HAL_DMA_STATE_READY;
  436. /* Process Unlocked */
  437. __HAL_UNLOCK(hdma);
  438. return HAL_ERROR;
  439. }
  440. /* Check for the Timeout */
  441. if(Timeout != HAL_MAX_DELAY)
  442. {
  443. if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  444. {
  445. /* Update error code */
  446. hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
  447. /* Change the DMA state */
  448. hdma->State = HAL_DMA_STATE_READY;
  449. /* Process Unlocked */
  450. __HAL_UNLOCK(hdma);
  451. return HAL_ERROR;
  452. }
  453. }
  454. }
  455. if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
  456. {
  457. /* Clear the transfer complete flag */
  458. hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1cU));
  459. /* The selected Channelx EN bit is cleared (DMA is disabled and
  460. all transfers are complete) */
  461. hdma->State = HAL_DMA_STATE_READY;
  462. }
  463. else
  464. {
  465. /* Clear the half transfer complete flag */
  466. hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU));
  467. }
  468. /* Process unlocked */
  469. __HAL_UNLOCK(hdma);
  470. return HAL_OK;
  471. }
  472. /**
  473. * @brief Handle DMA interrupt request.
  474. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  475. * the configuration information for the specified DMA Channel.
  476. * @retval None
  477. */
  478. void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
  479. {
  480. uint32_t flag_it = hdma->DmaBaseAddress->ISR;
  481. uint32_t source_it = hdma->Instance->CCR;
  482. /* Half Transfer Complete Interrupt management ******************************/
  483. if ((0U != (flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_HT)))
  484. {
  485. /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
  486. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  487. {
  488. /* Disable the half transfer interrupt */
  489. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  490. }
  491. /* Clear the half transfer complete flag */
  492. hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1cU);
  493. /* DMA peripheral state is not updated in Half Transfer */
  494. /* but in Transfer Complete case */
  495. if(hdma->XferHalfCpltCallback != NULL)
  496. {
  497. /* Half transfer callback */
  498. hdma->XferHalfCpltCallback(hdma);
  499. }
  500. }
  501. /* Transfer Complete Interrupt management ***********************************/
  502. else if ((0U != (flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TC)))
  503. {
  504. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  505. {
  506. /* Disable the transfer complete and error interrupt */
  507. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
  508. /* Change the DMA state */
  509. hdma->State = HAL_DMA_STATE_READY;
  510. }
  511. /* Clear the transfer complete flag */
  512. hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1cU));
  513. /* Process Unlocked */
  514. __HAL_UNLOCK(hdma);
  515. if(hdma->XferCpltCallback != NULL)
  516. {
  517. /* Transfer complete callback */
  518. hdma->XferCpltCallback(hdma);
  519. }
  520. }
  521. /* Transfer Error Interrupt management **************************************/
  522. else if ((0U != (flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TE)))
  523. {
  524. /* When a DMA transfer error occurs */
  525. /* A hardware clear of its EN bits is performed */
  526. /* Disable ALL DMA IT */
  527. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  528. /* Clear all flags */
  529. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
  530. /* Update error code */
  531. hdma->ErrorCode = HAL_DMA_ERROR_TE;
  532. /* Change the DMA state */
  533. hdma->State = HAL_DMA_STATE_READY;
  534. /* Process Unlocked */
  535. __HAL_UNLOCK(hdma);
  536. if (hdma->XferErrorCallback != NULL)
  537. {
  538. /* Transfer error callback */
  539. hdma->XferErrorCallback(hdma);
  540. }
  541. }
  542. else
  543. {
  544. /* Nothing To Do */
  545. }
  546. return;
  547. }
  548. /**
  549. * @brief Register callbacks
  550. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  551. * the configuration information for the specified DMA Channel.
  552. * @param CallbackID User Callback identifier
  553. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  554. * @param pCallback pointer to private callback function which has pointer to
  555. * a DMA_HandleTypeDef structure as parameter.
  556. * @retval HAL status
  557. */
  558. HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
  559. {
  560. HAL_StatusTypeDef status = HAL_OK;
  561. /* Process locked */
  562. __HAL_LOCK(hdma);
  563. if(HAL_DMA_STATE_READY == hdma->State)
  564. {
  565. switch (CallbackID)
  566. {
  567. case HAL_DMA_XFER_CPLT_CB_ID:
  568. hdma->XferCpltCallback = pCallback;
  569. break;
  570. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  571. hdma->XferHalfCpltCallback = pCallback;
  572. break;
  573. case HAL_DMA_XFER_ERROR_CB_ID:
  574. hdma->XferErrorCallback = pCallback;
  575. break;
  576. case HAL_DMA_XFER_ABORT_CB_ID:
  577. hdma->XferAbortCallback = pCallback;
  578. break;
  579. default:
  580. status = HAL_ERROR;
  581. break;
  582. }
  583. }
  584. else
  585. {
  586. status = HAL_ERROR;
  587. }
  588. /* Release Lock */
  589. __HAL_UNLOCK(hdma);
  590. return status;
  591. }
  592. /**
  593. * @brief UnRegister callbacks
  594. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  595. * the configuration information for the specified DMA Channel.
  596. * @param CallbackID User Callback identifier
  597. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  598. * @retval HAL status
  599. */
  600. HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
  601. {
  602. HAL_StatusTypeDef status = HAL_OK;
  603. /* Process locked */
  604. __HAL_LOCK(hdma);
  605. if(HAL_DMA_STATE_READY == hdma->State)
  606. {
  607. switch (CallbackID)
  608. {
  609. case HAL_DMA_XFER_CPLT_CB_ID:
  610. hdma->XferCpltCallback = NULL;
  611. break;
  612. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  613. hdma->XferHalfCpltCallback = NULL;
  614. break;
  615. case HAL_DMA_XFER_ERROR_CB_ID:
  616. hdma->XferErrorCallback = NULL;
  617. break;
  618. case HAL_DMA_XFER_ABORT_CB_ID:
  619. hdma->XferAbortCallback = NULL;
  620. break;
  621. case HAL_DMA_XFER_ALL_CB_ID:
  622. hdma->XferCpltCallback = NULL;
  623. hdma->XferHalfCpltCallback = NULL;
  624. hdma->XferErrorCallback = NULL;
  625. hdma->XferAbortCallback = NULL;
  626. break;
  627. default:
  628. status = HAL_ERROR;
  629. break;
  630. }
  631. }
  632. else
  633. {
  634. status = HAL_ERROR;
  635. }
  636. /* Release Lock */
  637. __HAL_UNLOCK(hdma);
  638. return status;
  639. }
  640. /**
  641. * @}
  642. */
  643. /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
  644. * @brief Peripheral State and Errors functions
  645. *
  646. @verbatim
  647. ===============================================================================
  648. ##### Peripheral State and Errors functions #####
  649. ===============================================================================
  650. [..]
  651. This subsection provides functions allowing to
  652. (+) Check the DMA state
  653. (+) Get error code
  654. @endverbatim
  655. * @{
  656. */
  657. /**
  658. * @brief Return the DMA handle state.
  659. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  660. * the configuration information for the specified DMA Channel.
  661. * @retval HAL state
  662. */
  663. HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
  664. {
  665. /* Return DMA handle state */
  666. return hdma->State;
  667. }
  668. /**
  669. * @brief Return the DMA error code.
  670. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  671. * the configuration information for the specified DMA Channel.
  672. * @retval DMA Error Code
  673. */
  674. uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
  675. {
  676. return hdma->ErrorCode;
  677. }
  678. /**
  679. * @}
  680. */
  681. /**
  682. * @}
  683. */
  684. /** @addtogroup DMA_Private_Functions
  685. * @{
  686. */
  687. /**
  688. * @brief Sets the DMA Transfer parameter.
  689. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  690. * the configuration information for the specified DMA Channel.
  691. * @param SrcAddress The source memory Buffer address
  692. * @param DstAddress The destination memory Buffer address
  693. * @param DataLength The amount of data items to be transferred from source to destination
  694. * @retval HAL status
  695. */
  696. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  697. {
  698. /* Clear all flags */
  699. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
  700. /* Configure DMA Channel data length */
  701. hdma->Instance->CNDTR = DataLength;
  702. /* Memory to Peripheral */
  703. if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
  704. {
  705. /* Configure DMA Channel destination address */
  706. hdma->Instance->CPAR = DstAddress;
  707. /* Configure DMA Channel source address */
  708. hdma->Instance->CMAR = SrcAddress;
  709. }
  710. /* Peripheral to Memory */
  711. else
  712. {
  713. /* Configure DMA Channel source address */
  714. hdma->Instance->CPAR = SrcAddress;
  715. /* Configure DMA Channel destination address */
  716. hdma->Instance->CMAR = DstAddress;
  717. }
  718. }
  719. /**
  720. * @}
  721. */
  722. /**
  723. * @}
  724. */
  725. #endif /* HAL_DMA_MODULE_ENABLED */
  726. /**
  727. * @}
  728. */
  729. /**
  730. * @}
  731. */